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參數(shù)資料
| 型號(hào)： | 83F6073 |
| 英文描述： | IC-SM-8-BIT LATCH DRIVER |
| 中文描述： | 集成電路釤8位鎖存驅(qū)動(dòng) |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 137K |
| 代理商： | 83F6073 |
8-11
Micrel
MIC5800/5801
8
MIC5800/5801
4/8-Bit Parallel-Input Latched Drivers
Ordering Information
Part Number
Temperature Range
Package
MIC5800BN
MIC5800AJ
5962-8764002CA
1
MIC5800BM
MIC5801BN
MIC5801AJ
5962-8764001WA
2
MIC5801BV
MIC5801BWM
– 40
°
C to + 85
°
C
– 55
°
C to +125
°
C
– 55
°
C to +125
°
C
– 40
°
C to + 85
°
C
– 40
°
C to +85
°
C
– 55
°
C to +125
°
C
– 55
°
C to +125
°
C
– 40
°
C to + 85
°
C
– 40
°
C to +85
°
C
14–Pin Plastic DIP
14–Pin CERDIP
14–Pin CERDIP
14–Pin SOIC
22–Pin Plastic DIP
22–Pin CERDIP
22–Pin CERDIP
28–Pin PLCC
24–Pin SOIC
1
Standard Military Drawing number for MIC5800AJBQ
2
Standard Military Drawing number for MIC5801AJBQ
General Description
The MIC5800/5801 latched drivers are high-voltage, high-
current integrated circuits comprised of four or eight CMOS
data latches, a bipolar Darlington transistor driver for each
latch, and CMOS control circuitry for the common CLEAR,
STROBE, and OUTPUT ENABLE functions.
The bipolar/MOS combination provides an extremely low-
power latch with maximum interface flexibility. MIC5800
contains four latched drivers; MIC5801 contains eight latched
drivers.
Data input rates are greatly improved in these devices. With
a 5V supply, they will typically operate at better than 5MHz.
With a 12V supply, significantly higher speeds are obtained.
The CMOS inputs are compatible with standard CMOS,
PMOS, and NMOS circuits. TTL or DTL circuits may require
the use of appropriate pull-up resistors. The bipolar outputs
are suitable for use with relays, solenoids, stepping motors,
LED or incandescent displays, and other high-power loads.
Both units have open-collector outputs and integral diodes for
inductive load transient suppression. The output transistors
are capable of sinking 500mA and will sustain at least 50V in
the OFF state. Because of limitations on package power
dissipation, the simultaneous operation of all drivers at maxi-
mum rated current can only be accomplished by a reduction
in duty cycle. Outputs may be paralleled for higher load
current capability.
DD
V
N
IN
STROBE
CLEAR
OUTPUT
ENABLE
GROUND
N
OUT
COMMON
COMMON MOS
CONTROL
TYPICAL MOS LATCH
TYPICAL BIPOLAR DRIVER
Functional Diagram
Features
4.4MHz Minimum Data Input Rate
High-Voltage, Current Sink Outputs
Output Transient Protection
CMOS, PMOS, NMOS, and TTL Compatible Inputs
Internal Pull-Down Resistors
Low-Power CMOS Latches
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