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參數(shù)資料
| 型號： | 83502-22 |
| 廠商： | PEREGRINE SEMICONDUCTOR CORP |
| 元件分類： | 諧振器 |
| 英文描述： | 3.5 GHz Low Power CMOS Divide-by-4 Prescaler |
| 中文描述： | PRESCALER, PDSO8 |
| 封裝： | MSOP-8 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 247K |
| 代理商： | 83502-22 |
Product Specification
PE83502
Page 2 of 8
2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0125-02
│ UltraCMOS RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
Figure 3. Pin Configuration (Top View)
Device Functional Considerations
The PE83502 takes an input signal frequency
from 1.5 GHz to 3.5 GHz and produces an output
signal frequency one-fourth that of the supplied
input. In order for the prescaler to work properly,
several conditions need to be adhered to. It is
crucial that pin 3 be supplied with a bypass
capacitor to ground. In addition, the input and
output signals (pins 2 & 7, respectively) need to
be AC coupled via an external capacitor as shown
in the test circuit in Figure 4.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance.
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Exposure
to absolute maximum ratings for extended periods
may affect device reliability.
PE83502
1
2
3
4
8
7
6
5
IN
GND
DEC
GND
OUT
VDD
GND
Pin
No.
Pin
Name
Description
1
VDD
Power supply pin. Bypassing is required.
2
IN
Input signal pin. Should be coupled with a
capacitor (eg 15 pF)
3
DEC
Power supply decoupling pin. Place a
capacitor as close as possible and connect
directly to the ground plane (eg 10 nF and
10 pF).
4
GND
Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
5
GND
Ground pin.
6
GND
Ground pin.
7
OUT
Divided frequency output pin. This pin
should be coupled with a capacitor (eg 100
pF).
8
GND
Ground pin.
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Supply voltage
4.0
V
TST
Storage temperature
range
-65
150
°C
TOP
Operating temperature
range
-55
125
°C
VESD
ESD voltage (Human
Body Model)
250
V
PINMAX
Maximum input power
15
dBm
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