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參數(shù)資料
| 型號： | 82C931 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Plug and Play Integrated Audio Controller |
| 中文描述： | 即插即用集成音頻控制器 |
| 文件頁數(shù)： | 52/64頁 |
| 文件大小： | 634K |
| 代理商： | 82C931 |
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82C931
Page 44
912-3000-035
Revision: 2.1
OPTi
CIR22
OUTL Output Control Register
Default = 80h
Mute:
0 = Disable
1 = Enable
Reserved
Gain select for OUTL (dB):
00000 = 0
00001 = –3
00010 = –6
00011 = –9
00100 = –12
00101 = –15
00110 = –18
00111 = –21
01000 = –24
01001 = –27
01010 = –30
01011 = –33
01100 = –36
01101 = –39
01110 = –42
01111 = –45
10000 = –48
10001 = –51
10010 = –54
10011 = –57
10100 = –60
10101 = –63
10110 = –66
10111 = –69
11000 = –72
11001 = –75
11010 = –78
11011 = –81
11100 = –84
11101 = –87
11110 = –90
11111 = –93
Reserved
CIR23
OUTR Output Control Register
Default = 80h
Mute:
0 = Disable
1 = Enable
Reserved
Gain select for OUTR (dB):
Refer to CIR22[5:1] for decode.
Reserved
CIR24-CIR27
Reserved
Default = 00h
CIR28
Capture Data Format
Default = 00h
Audio data format - linear PCM or companded
for all input and output data
(used in conjunction with bit 5):
(1)
000 = Linear, 8-bit unsigned
001 = μ-law, 8-bit companded
010 = Linear, 16-bit two’s complement, Little Endian
011 = A-Law, 8-bit companded
100 = Reserved
101 = ADPCM, 4-bit, IMA compatible
110 = Linear, 16-bit two’s complement, Big Endian
111 = Reserved
Note:
Bit 7 is not available in Mode 1 (forced to 0).
(1) SB/WSS mode switch: In Sound Blaster mode, the software driver should set CDF to 8 bit PCM mode (R8: FM1,FM-,C_L).
(2) Selecting stereo results with alternating samples representing left and right audio channels. Mono playback plays the same audio sample
on both channels. Mono capture only captures data from the left audio channel.
Note:
The contents of this register can only be changed if the mode change bit (WSBase+04h[6]) is enabled (set to 1). Writes to this register
without the mode change bit enabled will have no affect.
Stereo/mono:
(2)
0 = Mono
1 = Stereo
Reserved
CIR29
Reserved
Default = 00h
CIR30
Capture Upper Base Count
Upper Base Count:
Default = 00h
This byte is the upper byte of the base count register containing the eight most significant bits of the 16-bit base register.
Reads from this register return the same value which was written.
CIR31
Capture Lower Base Count
Upper Base Count:
Default = 00h
This byte is the lower byte of the base count register containing the eight most significant bits of the 16-bit base register.
Reads from this register return the same value which was written.
Table 5-11
Expanded Mode CIR (cont.)
7
6
5
4
3
2
1
0
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| 82-CBSA-1.75X6.0X0.8 | 功能描述:82-CBSA-1.75X6.0X0.8--82S04--CIR 制造商:leader tech inc. 系列:* 零件狀態(tài):在售 類型:屏蔽，分體式 高度 - 總:0.800"（20.32mm） 長度 - 總:6.000"（152.40mm） 寬度 - 總:1.750"（44.45mm） 通風(fēng):通風(fēng)孔，按樣式排列 安裝類型:通孔 標(biāo)準(zhǔn)包裝:50 |
| 82-CBSA-3.75X4.5X0.8 | 功能描述:82-CBSA-3.75X4.5X0.8--82S12--CIR 制造商:leader tech inc. 系列:* 零件狀態(tài):在售 類型:屏蔽，分體式 高度 - 總:0.800"（20.32mm） 長度 - 總:4.500"（114.30mm） 寬度 - 總:3.750"（95.25mm） 通風(fēng):通風(fēng)孔，按樣式排列 安裝類型:通孔 標(biāo)準(zhǔn)包裝:50 |
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