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| 型號(hào)： | 82801DB |
| 廠商： | Intel Corp. |
| 英文描述： | Intel 82801DB I/O Controller Hub 4 (ICH4) |
| 中文描述： | 英特爾82801DB I / O控制器集線器4（ICH4） |
| 文件頁(yè)數(shù)： | 355/462頁(yè) |
| 文件大?。?/td> | 3450K |
| 代理商： | 82801DB |
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Intel
82801BA ICH2 Datasheet
11-11
USB Controller Registers
The SW Debug mode skips over inactive TDs and only halts after an active TD has been executed.
When the last active TD in a frame has been executed, the Host Controller waits until the next SOF
is sent and then fetches the first TD of the next frame before halting.
This HCHalted bit can also be used outside of Software Debug mode to indicate when the Host
Controller has detected the Run/Stop bit and has completed the current transaction. Outside of the
Software Debug mode, setting the Run/Stop bit to 0 always resets the SOF counter so that when the
Run/Stop bit is set the Host Controller starts over again from the frame list location pointed to by
the Frame List Index (see FRNUM Register description) rather than continuing where it stopped.
11.2.2
USBSTA—USB Status Register
I/O Offset:
Default Value:
Base + (02–03h)
0020h
Attribute:
Size:
R/WC
16 bits
This register indicates pending interrupts and various states of the Host Controller. The status
resulting from a transaction on the serial bus is not indicated in this register. Software sets a bit to 0
in this register by writing a 1 to it.
Bit
Description
15:6
Reserved.
5
HCHalted
—R/WC.
1 = The Host Controller has stopped executing as a result of the Run/Stop bit being set to 0, either
by software or by the Host Controller hardware (debug mode or an internal error). Default.
0 = Software resets this bit to 0 by writing a 1 to the bit position.
4
Host Controller Process Error
—R/WC.
1 = The Host Controller has detected a fatal error. This indicates that the Host Controller suffered
a consistency check failure while processing a Transfer Descriptor. An example of a
consistency check failure would be finding an illegal PID field while processing the packet
header portion of the TD. When this error occurs, the Host Controller clears the Run/Stop bit
in the Command register to prevent further schedule execution. A hardware interrupt is
generated to the system.
0 = Software resets this bit to 0 by writing a 1 to the bit position.
3
Host System Error
—R/WC.
1 = A serious error occurred during a host system access involving the Host Controller module. In
a PCI system, conditions that set this bit to 1 include PCI Parity error, PCI Master Abort, and
PCI Target Abort. When this error occurs, the Host Controller clears the Run/Stop bit in the
Command register to prevent further execution of the scheduled TDs. A hardware interrupt is
generated to the system.
0 = Software resets this bit to 0 by writing a 1 to the bit position.
2
Resume Detect (RSM_DET)
—R/WC.
1 = The Host Controller received a “RESUME” signal from a USB device. This is only valid if the
Host Controller is in a global suspend state (bit 3 of Command register = 1).
0 = Software resets this bit to 0 by writing a 1 to the bit position.
1
USB Error Interrupt
—R/WC.
1 = Completion of a USB transaction resulted in an error condition (e.g., error counter underflow).
If the TD on which the error interrupt occurred also had its IOC bit set, both this bit and Bit 0
are set.
0 = Software resets this bit to 0 by writing a 1 to the bit position.
0
USB Interrupt (USBINT)
—R/WC.
1 = The Host Controller sets this bit when the cause of an interrupt is a completion of a USB
transaction whose Transfer Descriptor had its IOC bit set. Also set when a short packet is
detected (actual length field in TD is less than maximum length field in TD), and short packet
detection is enabled in that TD.
0 = Software resets this bit to 0 by writing a 1 to the bit position.
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 82801AA | 82801AB (ICH0) I/O Controller Hub |
| 82801AB | 82801AB (ICH0) I/O Controller Hub |
| 82803AAMRH-R | Controller Miscellaneous - Datasheet Reference |
| 82804AA | Interface IC |
| 82805AA | Interface IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 82801E | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel 82801E Communications I/O Controller Hub (C-ICH) |
| 82801FB | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 6 (ICH6) Family |
| 82801FBM | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 6 (ICH6) Family |
| 82801FR | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 6 (ICH6) Family |
| 82801GBICH7 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 7 |
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