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參數(shù)資料
| 型號： | 8103614SA |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | PLD |
| 英文描述： | OT PLD, 40 ns, CDFP20 |
| 封裝： | CERAMIC, DFP-20 |
| 文件頁數(shù)： | 4/19頁 |
| 文件大小： | 555K |
| 代理商： | 8103614SA |
PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M
PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
12
SRPS016
PARAMETER MEASUREMENT INFORMATION
tsu
S1
From Output
Under Test
Test
Point
R2
CL
(see Note A)
LOAD CIRCUIT FOR
3-STATE OUTPUTS
3 V
0
1.5 V
th
1.5 V
Timing
Input
Data
Input
In-Phase
Output
Out-of-Phase
Output
(see Note D)
tpd
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOH
VOL
3 V
0
3 V
0
1.5 V
tw
High-Level
Pulse
Low-Level
Pulse
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
1.5 V
3 V
0
≈ 3.3 V
VOL
VOH
VOH – 0.5 V
≈ 0 V
ten
tdis
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.5 V
R1
3 V
0
VOL + 0.5 V
5 V
NOTES: A. CL includes probe and jig capacitance and is 50 pF for tpd and ten, 5 pF for tdis.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2
is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses have the following characteristics: PRR
≤ 10 MHz, tr and tf ≤ 2 ns, duty cycle = 50%
D. When measuring propagation delay times of 3- state outputs, switch S1 is closed.
E. Equivalent loads may be used for testing.
Figure 1. Load Circuit and Voltage Waveforms
OBSOLETE - No Longer Available
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