CL
參數(shù)資料
型號(hào): 7SB3126CMX1TCG
廠商: ON Semiconductor
文件頁(yè)數(shù): 5/10頁(yè)
文件大?。?/td> 0K
描述: 1 BIT BUS SWITCH ULLGA 6
標(biāo)準(zhǔn)包裝: 3,000
類型: 總線開關(guān)
電路: 1 x 1:1
獨(dú)立電路: 1
電壓電源: 單電源
電源電壓: 4 V ~ 5.5 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-XFLGA
供應(yīng)商設(shè)備封裝: 6-ULLGA(1x1)
包裝: 帶卷 (TR)
7SB3126
http://onsemi.com
4
AC Loading and Waveforms
Figure 4. Load Circuit and Voltage Waveforms
500 W
CL = 50 pF
(see Note A)
7 V
From Output
Under Test
500 W
S1
Open
GND
LOAD CIRCUIT
TEST
S1
tPD
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
GND
Input
1.5 V
tPLH
tPHL
Output
3 V
VOH
0 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPZL
3 V
1.5 V
0 V
Output
Control
tPLZ
tPZH
tPHZ
1.5 V
3.5 V
0 V
VOL
VOH
VOL + 0.3 V
VOH 0.3 V
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The output is measured with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
DEVICE ORDERING INFORMATION
Device
Package
Shipping
7SB3126DTT1G
TSOP5
(PbFree)
3000 / Tape & Reel
7SB3126DFT2G
SC88A
(PbFree)
3000 / Tape & Reel
7SB3126AMX1TCG
ULLGA6 0.5 mm Pitch
(PbFree)
3000 / Tape & Reel
7SB3126BMX1TCG
ULLGA6 0.4 mm Pitch
(PbFree)
3000 / Tape & Reel
7SB3126CMX1TCG
ULLGA6 0.35 mm Pitch
(PbFree)
3000 / Tape & Reel
7SB3126MUTCG
UDFN6 0.4 mm Pitch
(PbFree)
3000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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