參數(shù)資料
型號: 7P192ATA2500C25
英文描述: Flash Memory Card(192M位閃速存儲器卡)
中文描述: 閃存卡(192M位閃速存儲器卡)
文件頁數(shù): 33/62頁
文件大?。?/td> 626K
代理商: 7P192ATA2500C25
7PxxxATA25xxC25
June 2000 Rev. 1 – ECO #12936
33
White Electronic Designs Corporation
(508) 366-5151
5. Sector number register:
This register contains the starting sector number which is started by following
a sector transfer command.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Sector number byte
6. Cylinder low register:
This register contains the low 8 bits of the starting cylinder address which is
started by following sector transfer command.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Cylinder low byte
7. Cylinder high register:
This register contains the high 8 bits of the starting cylinder address which is
started by following sector transfer command.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Cylinder high byte
8. Drive head register:
This register is used for selecting the Drive of Master/Slave organization and
Head number for the following command.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
1
LBA
1
DRV
Head number
bit
Name
Function
7
1
This bit is set to "1".
6
LBA
LBA is a flag to select either Cylinder / Head / Sector (CHS) or
Logical Block Address (LBA) mode. When LBA=0, CHS mode is
selected. When LBA=1, LBA mode is selected. In LBA mode, the
Logical Block Address is interrupted as follows:
LBA07-LBA00 : Sector Number Register D7-D0.
LBA15-LBA08 : Cylinder Low Register D7-D0.
LBA23-LBA16 : Cylinder High Register D7-D0.
LBA27-LBA24 : Drive / Head Register bits HS3-HS0.
5
1
This bit is set to "1".
4
DRV (DRiVe select)
This bit is used for selecting the Master (Card 0) and Slave (Card 1)
in Master/Slave organization. The card is set to be Card 0 or 1 by
using the DRV# of the Socket and Copy register.
3 to 0 Head number
This bit is used for selecting the Head number for the following
command. Bit 3 is MSB.
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