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參數(shù)資料
| 型號(hào)： | 7P128ATA1003C25 |
| 英文描述： | Flash Memory Card(128M位閃速存儲(chǔ)器卡) |
| 中文描述： | 閃存卡（128兆位閃速存儲(chǔ)器卡） |
| 文件頁數(shù)： | 9/25頁 |
| 文件大?。?/td> | 224K |
| 代理商： | 7P128ATA1003C25 |
June 2000 Rev. 5 - ECO #12901
9
PCMCIA Flash Memory Card
ATA10 Series
PC Card Products
Symbol
WAIT #
Type
Name and Function
OUTPUT
WAIT:
This signal outputs low level for purpose of delaying memory
or I/O access cycle. In True IDE Mode this signal can be used as
IORDY.
Battery Voltage Detect 2, Data audio output, Disk active/slave
present:
In memory card mode, BVD2 is always high. In I/O mode,
SPKR # is held high: no digital audio signals. In True IDE Mode
DASP# is Disk Active/Slave Present signal in Master/Slave
handshake protocol.
Battery Voltage Detect 1, Status Change, Pass Diagnostic:
In
memory card mode BVD1 Is set to high level. In I/O mode
STSCHNG # is used to alert the host to changes in Status registers. In
True IDE mode PDIG is the Pass Diagnostic signal in Master/Slave
handshake protocol.
VOLTAGE SENSE:
Notifies the host socket of the card's VCC
requirements. VS1 and VS2 are open to indicate a 5V, 16 bit card has
been inserted.
Card Select:
This signal is not used in memory and I/O mode. With
internal pull up resistor this signal is used to configure this card as
Master or Slave when configured in True IDE Mode. When this pin is
GND, selected Master config, when pin is open the card is configured
as a Slave.
Input Acknowledge
: This signal is not used in memory mode. It is
asserted by the card when the card is selected and responding to an
I/O read cycle at the address that is on the address bus. This signal is
used for the input data buffer control. In True IDE Mode this signal is
not used and should not be connected at the host.
I/O Read:
is used for control of read data in Task File area. This card
respond to this signal only in I/O interface mode
I/O Write:
is used for control of data write in Task File area. This card
respond to this signal only in I/O interface mode
BVD2
SPKR #
DASP#
Input/Output
BVD1
STSCHNG #
PDIAG #
Input/Output
VS1, VS2
OUTPUT
CSEL #
Input
INPACK #
Output
IORD #
Input
IOWR #
Input
Card Signal Description (Cont.)
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