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August 2000 Rev. 3 - ECO #13124
3
PCMCIA Flash Memory Card
FEB Series
PC Card Products
Symbol
A0 - A25
Type
Name and Function
INPUT
ADDRESS INPUTS:
A0 through A25 enable direct addressing of
up to 64MB of memory on the card. The memory will wrap at the
card density boundary. The system should not try to access memory
beyond the card density. The upper addresses are not connected.
DATA INPUT/OUTPUT:
DQ0 THROUGH DQ15 constitute the
bi-directional databus
. DQ0 - DQ7
constitute the lower (even) byte.
DQ8 – DQ15 are not connected. DQ7 is the MSB.
CARD ENABLE 1 AND 2:
CE1#
enables even byte accesses,
CE2# enables odd byte accesses. CE2# is not connected.
OUTPUT ENABLE:
Active low signal enabling read data from the
memory card.
WRITE ENABLE:
Active low signal gating write data to the
memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase
or program algorithms. A high output indicates that the card is ready
to accept accesses. This signal is not connected.
CARD DETECT 1 and 2:
Provide card insertion detection. These
signals are connected to ground internally on the memory card. The
host socket interface circuitry shall supply 10K-ohm or larger pull-up
resistors on these signal pins.
WRITE PROTECT:
This signal is pulled low internally. This
signifies write protect = "off " for all cases.
PROGRAM/ERASE POWER SUPPLY:
12V. Not connected for
5V only card.
CARD POWER SUPPLY:
5.0V
GROUND:
for all internal circuitry.
ATTRIBUTE MEMORY SELECT:
This signal is not connected
- card does not have attribute memory.
RESET:
Active high signal for placing cards in Power-on default
state. Reset can be used as a Power-Down signal for the memory
array.
WAIT:
This signal is pulled high internally for compatibility. No
wait states are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to
maintain SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card's VCC
requirements. VS1 and VS2 are open to indicate a 5V card has been
inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven
or left floating
DQ0 – DQ15
INPUT/OUT
CE1#, CE2#
INPUT
OE#
INPUT
WE#
INPUT
RDY/BSY#
N.C.
CD1#, CD2#
OUTPUT
WP
OUTPUT
VPP1, VPP2
N.C.
VCC
GND
REG#
N.C.
RST
N.C.
WAIT#
OUTPUT
BVD1, BVD2
OUTPUT
VS1, VS2
OUTPUT
RFU
N.C.
Function Mode
Standby Mode
Read Low Byte Access
Write Low Byte Access
/REG /CE2
X
X
X
/CE1
H
L
L
/OE
X
L
H
/WE
X
H
L
D15-D8
High-Z
High-Z
X
D7-D0
High-Z
Even-Byte
Even-Byte
X
X
X
Functional Truth Table
Card Signal Description