參數(shù)資料
型號: 7LVC646APWDH
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Octal bus transceiver/register 3-State
中文描述: LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
文件頁數(shù): 9/16頁
文件大小: 138K
代理商: 7LVC646APWDH
Philips Semiconductors
Product specification
74LVC646A
Octal bus transceiver/register (3-State)
1998 Jul 29
9
AC WAVEFORMS
V
M
= 1.5V at V
CC
V
M
= 0.5V * V
CC
at V
CC
V
and V
OH
are the typical output voltage drop that occur with the
output load.
V
X
= V
OL
+ 0.3V at V
CC
2.7V
V
X
= V
OL
+ 0.1V
CC
at V
CC
<
2.7V
V
Y
= V
OH
– 0.3V at V
CC
2.7V
V
Y
= V
OH
– 0.1V
CC
at V
CC
<
2.7V
2.7V
2.7V
SV00761
VM
VM
An, Bn
INPUT
Bn, An
OUTPUT
tPHL
tPLH
GND
VOL
VI
VOH
Figure 1. Input An, Bn to output Bn, An propagation delays.
SV00760
VM
An, Bn
INPUT
CPAB, CPBA
OUTPUT
Bn, An
OUTPUT
VM
tW
tPHL
tPLH
1/fmax
tsu
th
tsu
th
GND
VOL
VOL
VI
VOH
VOH
Figure 2. A
n
, B
n
to CP
AB
, CP
BA
set-up and hold times, clock
CP
AB
, CP
BA
pulse width, maximum clock pulse frequency and
the CP
AB
, CP
BA
to output B
n
, A
n
propagation delays.
SV00759
VM
SAB, SBA
INPUT
Bn, An
OUTPUT
VM
tPLH
tPHL
GND
VI
VOL
VOH
Figure 3. Input S
AB
, S
BA
to output B
n
, A
n
propagation delay
times.
SV00758
outputs
disabled
outputs
enabled
outputs
enabled
tPHZ
tPZH
tPZL
tPLZ
VX
VOL
VI
VCC
GND
GND
VY
VOH
VM
VM
VM
OE INPUT
OUTPUT
HIGH–to–OFF
OFF–to–HIGH
OUTPUT
LOW–to–OFF
OFF–to–LOW
Figure 4. Input OE to output A
n
, B
n
3-State enable and disable
times.
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