參數(shù)資料
型號: 7LVC1284D
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 3.3V Parallel printer interface transceiver/buffer
中文描述: 7 I/O, PIA-PRINTER INTERFACE, PDSO20
文件頁數(shù): 6/10頁
文件大?。?/td> 100K
代理商: 7LVC1284D
Philips Semiconductors
Product specification
74LVC1284
3.3V Parallel printer interface transceiver/buffer
1995 Nov 10
6
PULSE
GENERATOR
R
T
V
IN
D.U.T.
V
OUT
50pF
V
CC
Test Circuit for B
n
or Y
n
Outputs
GND
V
CC
R
L
= 500
t
PLH
/
PHL
= 62
for SR test
PULSE
GENERATOR
R
T
V
IN
D.U.T
V
OUT
R
L
V
CC
Test Circuit for A
n
Outputs
V
M
NEGATIVE
PULSE
90%
t
W
POSITIVE
PULSE
10%
V
M
= 1.5V
Input Pulse Definition
74LVC
SY00004
S
1
C
L
t
W
10%
t
THL
(t
f
)
t
TLH
(t
r
)
90%
V
M
10%
V
M
90%
t
THL
(t
f
)
t
TLH
(t
r
)
AMP (V)
0V
AMP (V)
0V
V
M
10%
90%
SWITCH POSITION
Bn or Yn Outputs
TEST
t
PLH
t
PHL
SWITCH
GND
V
CC
DEFINITIONS
R
L
=
Load resistor; see AC CHARACTERISTICS for value.
C
L
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
=
pulse generators.
Termination resistance should be equal to Z
OUT
of
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude
Rep. Rate
t
W
t
r
t
f
3.0V
1MHz
500ns
3ns
3ns
Waveform 5.
PULSE
GENERATOR
V
I
R
T
D.U.T.
V
O
C
L
50pF
S
1
2 x V
CC
Open
GND
500
500
V
CC
V
I
2.7V
V
CC
2.7V
2.7V – 3.6V
Test
S
1
GND
t
PLZ
/t
PZL
t
PHZ
/t
PZH
2 x V
CC
t
PLH
/t
PHL
Open
SY00003
V
CC
Figure 1. Load Circuitry for Bn to An Switching Times
TEST CIRCUIT
D.U.T.
V
CC
I
O
V
CC
/2
I
is measured by forcing V
/2 on the output. RD can then
be calculated using the equation RD = V
CC
/2 I
O
.
SY00005
Figure 2. Output Impedance RD
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