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參數(shù)資料
| 型號(hào)： | 7C1041AV33-10 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 256K x 16 Static RAM |
| 中文描述： | 256K × 16靜態(tài)RAM |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 139K |
| 代理商： | 7C1041AV33-10 |
PRELIMINARY
256K x 16 Static RAM
Functional Description
CY7C1041AV33/
GVT73256A16
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
June 15, 2000
33
Features
Fast access times: 10, 12 ns
Fast OE access times: 5, 6, and 7 ns
Single +3.3V ±0.3V power supply
Fully static—no clock or timing strobes necessary
All inputs and outputs are TTL-compatible
Three state outputs
Center power and ground pins for greater noise
immunity
Easy memory expansion with CE and OE options
Automatic CE power-down
High-performance, low power consumption, CMOS
double-poly, double-metal process
Packaged in 44-pin, 400-mil SOJ and 44-pin, 400-mil
TSOP
Functional Block Diagram
The CY7C1049AV33\GVT73512A8 is organized as a 262,144
x 16 SRAM using a four-transistor memory cell with a high-per-
formance, silicon gate, low-power CMOS process. Cypress
SRAMs are fabricated using double-layer polysilicon, dou-
ble-layer metal technology.
This device offers center power and ground pins for improved
performance and noise immunity. Static design eliminates the
need for external clocks or timing strobes. For increased sys-
tem flexibility and eliminating bus contention problems, this de-
vice offers Chip Enable (CE), separate Byte Enable controls
(BLE and BHE) and Output Enable (OE) with this organization.
The device offers a low-power standby mode when chip is not
selected. This allows system designers to meet low standby
power requirements.
A
R
COLUMN DECODER
MEMORY ARRAY
512 ROWS X 256 X 16
COLUMNS
I
CE#
OE#
DQ8
DQ1
POWER
DOWN
A16
A0
DQ16
DQ9
BLE#
VCC
VSS
Top View
SOJ/TSOP II
WE
A
5
A
6
A
7
A
8
A
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
31
30
32
36
35
34
33
37
40
39
38
41
44
43
42
16
17
29
28
V
CC
V
SS
DQ
5
DQ
6
DQ
7
DQ
8
A
0
A
1
A
2
A
3
A
4
OE
BHE
BLE
V
SS
V
DQ
12
DQ
11
DQ
10
DQ
9
NC
A
17
A
16
A
15
DQ
16
DQ
15
DQ
14
DQ
13
CE
DQ
1
DQ
2
DQ
3
DQ
4
18
19
20
21
27
26
25
24
22
23
A
14
A
13
A
12
A
11
A
10
Pin Configuration
Selection Guide
CY7C1049AV33-10/
GVT73512A8-10
10
240
10
3.0
CY7C1049AV33-12/
GVT73512A8-12
12
210
10
3.0
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
Com’l/Ind’l
Com’l
L
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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