參數(shù)資料
型號(hào): 7B991RPFB
廠商: MAXWELL TECHNOLOGIES
元件分類: 時(shí)鐘及定時(shí)
英文描述: Programmable Skew Clock Buffer (PSCB)
中文描述: PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), DFP32
封裝: RAD PAK, DFP-16
文件頁數(shù): 10/17頁
文件大?。?/td> 253K
代理商: 7B991RPFB
M
10
All data sheets are subject to change without notice
2002 Maxwell Technologies.
All rights reserved.
Programmable Skew Clock Buffer (PSCB)
7B991
09.23.02 Rev 4
Test Mode
The TEST input is a three-level input. In normal systemoperation, this pin is connected to ground, allowing the
7B991RP to operate as explained briefly above (for testing purposes, any of the three-level inputs can have a remov-
able jumper to ground, or be tied LOW through a 100
resistor. This will allow an external tester to change the state
of these pins.)
If the TEST input is forced to its MID or HIGH state, the device will operate with its internal phase locked loop discon-
nected, and input levels supplied to REF will directly control all outputs. Relative output to output functions are the
same as in normal mode.
In contrast with normal operation (TEST tied LOW). All outputs will function based only on the connection of their own
function select inputs (xF0 and xF1) and the waveformcharacteristics of the REF input.
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