參數(shù)資料
型號(hào): 79RC32V364133DA
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): 微控制器/微處理器
英文描述: RISController Embedded 32-bit Microprocessor, based on RISCore32300
中文描述: 32-BIT, 133 MHz, RISC PROCESSOR, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, TQFP-144
文件頁(yè)數(shù): 5/21頁(yè)
文件大?。?/td> 370K
代理商: 79RC32V364133DA
5 of 21
June 20, 2000
79RC32364
*Notice: The information in this document is subject to change without notice
RC32364 also provides Ack*, Retry*, and BusErr* signals. This device
also provides I/D* signals, to indicate whether instructions or data is
being transferred. The Last* signal is provided to indicate that the last
data transfer is in progress.
The RC32364 provides six
external interrupt signals
: INT*[5:0] and
a non-maskable interrupt (NMI*) signal.
To share the system interface bus, the RC32364 provides BusReq*
and BusGnt* signals to interface
external DMA masters
. To allow the
external master control of the external bus, a DMA arbiter is provided.
The RC32364 supports a
variable bus width interface
, enabling the
CPU to operate with a mix of 8-bit, 16-bit, and 32-bit wide memories.
To indicate the width of the memory or I/O space being accessed, the
RC32364 provides two output signals, Width[1:0]. The width of various
address spaces is programmed using the Port Width Control Register.
The RC32364’s physical memory is divided into several regions, and
each region’s width can be programmed by using this register. Within
these regions, the bus turnaround time can also be programmed.
Thus, the RC32364 can be simply mated with low-cost external
memory subsystems. The large on-chip caches and the early restart
serve to allow the processor to achieve high-performance even with
such low-cost memory.
The RISCore32300 offers a number of features relevant to low-
power systems, including low-power design, active
power manage-
ment
and power-down modes of operation. The RISCore32300 is a
static design. The RC32364 supports a WAIT instruction which is
designed to signal the rest of the chip that execution and clocking should
be halted, reducing system power consumption during idle periods.
Thermal Considerations
The RC32364 is a low-power CPU, consuming approximately 0.9W
peak power. Thus, no special packaging considerations are required.
The RC32364 is guaranteed in a case temperature range of 0
°
to
+85
°
C, for commercial temperature devices; - 40
°
to +85
°
for industrial
temperature devices. The type of package, speed (power) of the device,
and airflow conditions affect the equivalent ambient temperature condi-
tions that will meet this specification.
The equivalent allowable ambient temperature, T
A
, can be calculated
using the thermal resistance from case to ambient (
CA
) of the given
package. The following equation relates ambient and case tempera-
tures:
T
A
= T
C
- P *
CA
where P is the maximum power consumption at hot temperature,
calculated by using the maximum I
CC
specification for the device.
Typical values for
CA
at various airflows are shown in Table 2 Note
that the RC32364 implements advanced power management, which
substantially reduces the average power dissipation of the device.
Revision History
August 1999
: Changed references from MIPS-II to MIPS 32.
Changed references from MIPS-IV to MIPS 64. Changed values in
Clock Parameters Table, System Interface Parameters Table, and
Power Consumption Table. Deleted Several Timing Diagrams. Added
JTAG TIming Diagram.
Jan. 12, 2000
: Corrected information regarding the TRST* signal in
Table 3. TRST* requires an external
pull-
down
on the board.
April 4, 2000
: Adjusted values for DCLK in the System Interface
Parameters table. Added Power Curves.
June 20, 2000
: Changed times for the Data Output Hold, TDO
Output Delay Time, and TPC Output Delay Time parameters in the
System Interface Parameters table. Revised values for PCST Output
Delay Time in System Interface Parameters table.
CA
Airflow (ft/min)
0
200
400
600
800
1000
144 TQFP
27
22
20
17
15
14
Table 2 Thermal Resistance (
CA) at Various Airflows
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