參數(shù)資料
型號(hào)： 78Q2120-64T
廠商： Electronic Theatre Controls, Inc.
英文描述： 10/100BASE-TX Ethernet Transceiver
中文描述： 10/100BASE-TX以太網(wǎng)收發(fā)器
文件頁(yè)數(shù)： 10/33頁(yè)
文件大小： 200K
代理商： 78Q2120-64T
78Q2120
10/100BASE-TX
Ethernet Transceiver
REGISTER DESCRIPTION
The 78Q2120 implements ten 16-bit registers which are accessible via the MDIO and MDC pins. The supported
registers are shown below. Unsupported registers will be read as all zeros. All of the registers respond to the
broadcast address, PHYAD value 00000.
The MII management 16-bit register set implemented in the 78Q2120 is as follows:
10
ADDRESS
SYMBOL
NAME
RESET VALUE (HEX)
0
MR0
Control
(3100)
1
2
MR1
MR2
Status
PHY Identifier 1
(7809)
0300
3
MR3
PHY Identifier 2
(E542)
4
5
MR4
MR5
Auto-Negotiation Advertisement
Auto-Negotiation Link Partner Ability
(01E1)
0000
6
MR6
Auto-Negotiation Expansion
0000
7
MR7
MR8-15
(Not implemented, read as zero)
(Reserved, read as zero)
0000
0000
8-15
16
MR16
Vendor Specific
0540
17
18
MR17
MR18
Interrupt Control/Status Register
Diagnostic Register
0000
(0000)
Note: MR 3.3:0 contains revision specific data.
LEGEND
TYPE
DESCRIPTION
TYPE
DESCRIPTION
R
Readable by management
W
Write-able by management
RC
0/1
Cleared on a read operation
Default value upon power-up or reset
SC
(0/1)
Self clearing, write-able
Default value dependent on pin setting. The value
in brackets indicates typical case.
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