參數(shù)資料
型號: 78M6618-IMR/F/P
廠商: TERIDIAN SEMICONDUCTOR CORP
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, QCC68
封裝: ROHS COMPLIANT, QFN-68
文件頁數(shù): 21/32頁
文件大?。?/td> 374K
代理商: 78M6618-IMR/F/P
78M6618 Data Sheet
DS_6618_005
28
Rev. 1.3
4.3
Digital Pins
Table 28: Digital Pins
Name
Type Circuit
Description
COM1,COM0
O
5
LCD Common Outputs: These 2 pins provide the select signals for an
LCD display.
DIO3
I/O
3,4
Dedicated DIO pin.
SEG0…SEG2,
SEG7, SEG8
SEG12,
SEG14…SEG18
O
5
Dedicated LCD Segment Output pins.
SEG24/DIO4…
SEG31/DIO11,
SEG33/DIO13…
SEG39/DIO19,
SEG63/DIO43
I/O
3, 4, 5
Multi-use pins, configurable as either LCD SEG driver or DIO.
(DIO4 = SCK, DIO5 = SDA when configured as EEPROM interface;
WPULSE = DIO6, VARPULSE = DIO7 when configured as pulse
outputs). If unused, these pins must be configured as DIOs and
set to outputs by the firmware.
SEG3/PCLK
SEG4/PSDO
SEG5/PCSZ
SEG6/PSDI
I/O
3, 4, 5
Multi-use pins, configurable as either LCD SEG driver or SPI PORT.
E_RXTX/SEG9
I/O
1, 4, 5
Multi-use pins, configurable as either emulator port pins (when ICE_E
pulled high) or LCD SEG drivers (when ICE_E tied to GND).
E_RST/SEG11
I/O
1, 4, 5
E_TCLK/SEG10
O
4, 5
ICE_E
I
2
ICE enable. When zero, E_RST, E_TCLK and E_RXTX become
SEG32, SEG33 and SEG38 respectively. For production units, this
pin should be pulled to GND to disable the emulator port.
CKTEST/SEG19,
MUXSYNC/SEG7
O
4, 5
Multi-use pins, configurable as either multiplexer/clock output or LCD
segment driver using the I/O RAM registers CKOUT_E or
MUX_SYNC_E.
TMUXOUT
O
4
Digital output test multiplexer. Controlled by TMUX[3:0].
OPT_RX/DIO1
I/O
3, 4, 7
Multi-use pin, configurable as Optical Receive Input or general DIO.
When configured as OPT_RX, this pin receives a signal from an external
photo-detector used in an IR serial interface. If unused, this pin must
be terminated to V3P3D or GNDD, or configured as a DIO and set
to an output by the firmware.
OPT_TX/DIO2
I/O
3, 4
Multi-use pin, configurable as either optical LED transmit output,
WPULSE, RPULSE, or general DIO. When configured as OPT_TX,
this pin is capable of directly driving an LED for transmitting data in
an IR serial interface. If unused, this pin must be left open, or
configured as a DIO and set to an output by the firmware.
RESET
I
2
Chip reset: This input pin is used to reset the chip into a known state.
For normal operation, this pin is pulled low. To reset the chip, this pin
should be pulled high. This pin has an internal 30
A (nominal)
current source pull-down. No external reset circuitry is necessary.
RX
I
3
UART input. If this pin is unused, it must be terminated to V3P3D
or GNDD.
TX
O
4
UART output.
TEST
I
7
Enables Production Test. This pin must be grounded in normal
operation.
Pin types: P = Power, O = Output, I = Input, I/O = Input/Output.
The circuit number denotes the equivalent circuit, as specified in Section 5 I/O Equivalent Circuits.
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