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參數(shù)資料
| 型號： | 7809LP |
| 廠商： | Maxwell Technologies, Inc |
| 元件分類： | ADC |
| 英文描述： | 16-Bit Latchup Protected Analog to Digital Converter |
| 中文描述： | 16位閉鎖保護(hù)模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 3/23頁 |
| 文件大?。?/td> | 462K |
| 代理商： | 7809LP |
M
3
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
16-Bit Latchup Protected Analog to Digital Converter
7809LP
01.11.05 Rev 7
21
BUSY
Busy Output. Falls when a conversion is started, and remains LOW until the conversion is com-
pleted and the data is latched into the output shift register. CS or R/C must be HIGH when
BUSY rises, or another conversion will start without time for signal acquisition.
22
PWRD
Power Down Input. If HIGH, conversions are inhibited and power consumption is significantly
reduced. Results fromthe previous conversions are maintained in the output shift register.
23
LPVANA
Latchup Protection Analog Supply.
24
LPVDIG
Latchup Protection Digital Supply.
T
ABLE
2. 7809LP A
BSOLUTE
M
AXIMUM
R
ATINGS
P
ARAMETER
S
YMBOL
M
IN
M
AX
U
NIT
Analog Inputs
R1
IN
R2
IN
R3
IN
CAP
REF
1
1. Indefinite short to AGND2, momentarily short to V
ANA
.
-25
-25
-25
V
ANA
+ 0.3
25
25
25
AGND2 - 0.3
V
V
V
V
Ground Voltage Differences: DGND, AGND2
V
ANA
V
DIG
V
DIG
to V
ANA
Specified Performance
Digital Inputs
Storage Temperature
-0.3
--
0.3
7
7
0.3
85
V
V
V
V
--
-40
-0.3
-65
°
C
V
V
DIG
+ 0.3
150
T
STG
°
C
T
ABLE
3. 7809LP DC A
CCURACY
S
PECIFICATIONS
(S
PECIFIED
P
ERFORMANCE
-40
TO
+85°C)
P
ARAMETER
M
IN
T
YP
M
AX
U
NIT
Integral Linearity Error
-40 to 85°C
Differential Linearity Error
-40 to 85°C
No Mssing Codes
2
Transition Noise
3
Full Scale Error
4,5
Full Scale Error
4,5
(using ext. 2.5000 V
ref
)
Full Scale Error Drift
--
--
--
--
15
--
--
--
--
--
--
--
--
--
±3
±5
-2, 3
-1, 6
--
--
±0.6
±0.6
--
LSB
1
LSB
LSB
Bits
LSB
%
%
ppm/
°
C
1.3
--
±7
T
ABLE
1. 7809LP P
IN
D
ESCRIPTION
P
IN
S
YMBOL
D
ESCRIPTION
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