參數(shù)資料
型號(hào): 780964
廠商: NEC Corp.
英文描述: Common to 78K/0 Series
中文描述: 共同的78K / 0系列
文件頁數(shù): 84/129頁
文件大?。?/td> 644K
代理商: 780964
84
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
User's Manual U12326EJ4V0UM
Decimal Adjust Register for Subtraction
ADJBS
Decimal Adjustment of Subtraction Result
[Instruction format]
ADJBS
[Operation]
Decimal Adjust Accumulator for Subtraction
[Operand]
None
[Flag]
Z
AC
CY
×
×
×
[Description]
The A register, CY flag and AC flag are decimally adjusted from their contents. This instruction carries out
an operation having meaning only when the BCD (binary coded decimal) data is subtracted and the
subtraction result is stored in the A register (in all other cases, the instruction carries out an operation having
no meaning).
See the table below for the adjustment method.
If the adjustment result shows that the A register contents are 0, the Z flag is set (1). In all other cases,
the Z flag is cleared (0).
Condition
Operation
AC = 0
CY = 0
A
A, CY
0, AC
0
CY = 1
A
A–01100000B, CY
1, AC
0
AC = 1
CY = 0
A
A–00000110B, CY
0, AC
0
CY = 1
A
A–01100110B, CY
1, AC
0
相關(guān)PDF資料
PDF描述
78098 Common to 78K/0 Series
78098B Common to 78K/0 Series
78044H Common to 78K/0 Series
78058F common to 78K/0 Series
780001 Common to 78K/0 Series
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