- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382825 > 75F657SC (FAIRCHILD SEMICONDUCTOR CORP) Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and 3-STATE Outputs PDF資料下載
參數(shù)資料
| 型號： | 75F657SC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and 3-STATE Outputs |
| 中文描述： | F/FAST SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | 0.300 INCH, MS-013, SOIC-24 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 61K |
| 代理商： | 75F657SC |
www.fairchildsemi.com
2
7
Unit Loading/Fan Out
Functional Description
The Transmit/Receive (T/R) input determines the direction
of the data flow through the bidirectional transceivers.
Transmit (active HIGH) enables data from the A Port to the
B Port; Receive (active LOW) enables data from the B Port
to the A Port.
The Output Enable (OE) input disables the parity and
ERROR outputs and both the A and B Ports by placing
them in a HIGH-Z condition when the Output Enable input
is HIGH.
When transmitting (T/R HIGH), the parity generator detects
whether an even or odd number of bits on the A Port are
HIGH and compares these with the condition of the parity
select (ODD/EVEN). If the Parity Select is HIGH and an
even number of A inputs are HIGH, the Parity output is
HIGH.
In receiving mode (T/R LOW), the parity select and number
of HIGH inputs on port B are compared to the condition of
the Parity input. If an even number of bits on the B Port are
HIGH, the parity select is HIGH, and the PARITY input is
HIGH, then ERROR will be HIGH to indicate no error. If an
odd number of bits on the B Port are HIGH, the parity
select is HIGH, and the PARITY input is HIGH, the ERROR
will be LOW indicating an error.
Function Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Function Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Pin Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW
Output I
OH
/I
OL
A
0
–A
7
Data Inputs/
4.5/0.15
90
μ
A/
90
μ
A
3-STATE Outputs
150/40 (33.3)
3 mA/24 mA (20 mA)
B
0
–B
7
Data Inputs/
3.5/0.117
70
μ
A/
70
μ
A
3-STATE Outputs
600/106.6 (80)
12 mA/64 mA (48 mA)
T/R
Transmit/Receive Input
2.0/0.067
40
μ
A/
40
μ
A
OE
Enable Input
2.0/0.067
40
μ
A/
40
μ
A
PARITY
Parity Input/
3.5/0.117
70
μ
A/
70
μ
A
3-STATE Output
600/106.6 (80)
12 mA/64 mA (48 mA)
ODD/EVEN
ODD/EVEN Parity Input
1.0/0.033
20
μ
A/
20
μ
A
ERROR
Error Output
600/106.6 (80)
12 mA/64 mA (48 mA)
Number of
Inputs that
are HIGH
Inputs
Input/
Output
Outputs
OE T/R
ODD/
EVEN
H
L
H
H
L
L
H
L
H
H
L
L
X
Parity
ERROR
Outputs
Mode
Transmit
Transmit
Receive
Receive
Receive
Receive
Transmit
Transmit
Receive
Receive
Receive
Receive
Z
0, 2, 4, 6, 8
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
L
L
L
L
H
H
L
L
L
L
X
H
L
H
L
H
L
L
H
H
L
H
L
Z
Z
Z
H
L
L
H
Z
Z
L
H
H
L
Z
1, 3, 5, 7
Immaterial
Inputs
Outputs
OE
T/R
L
L
Bus B Data to Bus A
L
H
Bus A Data to Bus B
H
X
High-Z State
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 75K62100 | NETWORK SEARCH ENGINE |
| 75KTA062134-200 | Network Search Engine Development Board for the Intel㈢ IXDP2400 Development Platform |
| 75KTA162134 | Network Search Engine Development Board for the Intel㈢ IXDP2401 IXDP2801 and IXDP2851 Development Platforms |
| 75N42102 | NETWORK SEARCH ENGINE 32K x 72 Entries |
| 75N43102 | NETWORK SEARCH ENGINE 32K x 72 Entries |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 75F6810R | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 75F6981R | 制造商:undefined 功能描述: |
| 75F73R2R | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 75F7560R | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 75F80R6P | 制造商: 功能描述: 制造商:undefined 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。