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參數(shù)資料
| 型號(hào)： | 75418-EP |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | POWER GOOD FAST-TRANSIENT-RESPONSE 2-A LOW-DROPOUT VOLTAGE REGULATORS |
| 中文描述： | 電源良好快速瞬態(tài)響應(yīng)2 -低壓差電壓調(diào)節(jié)器 |
| 文件頁(yè)數(shù)： | 20/27頁(yè) |
| 文件大?。?/td> | 388K |
| 代理商： | 75418-EP |
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TPS75201-EP TPS75215-EP TPS75218-EP TPS75225-EP TPS75233-EP WITH RESET
TPS75401-EP
’
75415-EP
’
75418-EP
’
75425-EP
’
75433-EP WITH POWER GOOD
FAST-TRANSIENT-RESPONSE 2-A LOW-DROPOUT VOLTAGE REGULATORS
SGLS165
–
APRIL 2003
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
regulator protection
The TPS752xx and TPS754xx PMOS-pass transistors has a built-in back diode that conducts reverse currents
when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the
output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may
be appropriate.
The TPS752xx and TPS754xx also feature internal current limiting and thermal protection. During normal operation,
the TPS752xx and TPS754xx limit output current to approximately 3.3 A. When current limiting engages, the output
voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross
device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature
of the device exceeds 150
°
C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below
130
°
C(typ), regulator operation resumes.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125
°
C; the maximum junction temperature
should be restricted to 125
°
C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than or
equal to P
D(max)
.
The maximum-power-dissipation limit is determined using the following equation:
PD(max)
TJmax
TA
RJA
Where:
T
J
max
is the maximum allowable junction temperature
R
θ
JA
is the thermal resistance junction-to-ambient for the package, i.e., 34.6
°
C/W for the 20-terminal
PWP with no airflow (see Table 1).
T
A
is the ambient temperature.
(3)
The regulator dissipation is calculated using:
PD
VI
VO
IO
(4)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal
protection circuit.
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