參數(shù)資料
型號: 74VHCT574ASJX
廠商: Fairchild Semiconductor
文件頁數(shù): 2/8頁
文件大小: 0K
描述: IC FLIP FLOP OCT D 3ST 20SOP
標(biāo)準(zhǔn)包裝: 2,000
系列: 74VHCT
功能: 標(biāo)準(zhǔn)
類型: D 型總線
輸出類型: 三態(tài)非反相
元件數(shù): 1
每個元件的位元數(shù): 8
頻率 - 時鐘: 130MHz
延遲時間 - 傳輸: 4.1ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 8mA,8mA
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
www.fairchildsemi.com
2
7
4
VH
CT57
4A
Pin Descriptions
Truth Table
H
HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial
Z
High Impedance
LOW-to-HIGH Transition
Functional Description
The VHCT574A consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are com-
mon to all flip-flops. The eight flip-flops will store the state
of their individual D inputs that meet the setup and hold
time requirements on the LOW-to-HIGH Clock (CP) transi-
tion. With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
D0–D7
Data Inputs
CP
Clock Pulse Input 3-STATE
OE
Output Enable Input 3-STATE
O0–O7
Outputs
Inputs
Outputs
Dn
CP
OE
On
H
L
H
L
L
X
H
Z
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