參數(shù)資料
型號: 74VHCT540ASJX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 8-Bit Inverting Buffer/Driver
中文描述: AHCT/VHCT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20
封裝: 5.30 MM, LEAD FREE, EIAJ TYPE2, SOP-20
文件頁數(shù): 1/6頁
文件大?。?/td> 84K
代理商: 74VHCT540ASJX
June 1997
Revised April 1999
7
1999 Fairchild Semiconductor Corporation
DS500012.prf
www.fairchildsemi.com
74VHCT540A
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHCT540A is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It achieves
the high-speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation.
The VHCT540A is an octal buffer/line driver designed to be
employed as memory and address drivers, clock drivers
and bus oriented transmitter/receivers.
This device is similar in function to the VHCT240A while
providing flow-through architecture (inputs on opposite side
from outputs). This pinout arrangement makes this device
especially useful as an output port for microprocessors,
allowing ease of layout and greater PC board density.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. This device can be used to interface 3V to
5V systems and two supply systems such as battery
backup. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note 1:
Outputs in OFF-STATE
Features
I
High Speed:
t
PD
=
5.4 ns (typ) at V
CC
=
5V
I
CC
=
4
μ
A (max) at T
A
=
25
°
C
I
Power down protection is provided on all inputs and
outputs
I
Pin and function compatible with 74HCT540
I
Low Power Dissipation:
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Pin Descriptions
Connection Diagram
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Order Number
74VHCT540AM
74VHCT540ASJ
74VHCT540AMTC
74VHCT540AN
Package Number
M20B
M20D
MTC20
N20A
Package Dissipation
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names
Description
OE
1
, OE
2
I
0
- I
7
O
0
- O
7
3-STATE Output Enable Inputs
Inputs
3-STATE Outputs
Inputs
Outputs
OE
1
L
H
X
L
OE
2
L
X
H
L
I
H
X
X
L
L
Z
Z
H
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