參數(shù)資料
型號(hào): 74VHCT374ASJ
廠商: Fairchild Semiconductor
文件頁數(shù): 1/9頁
文件大?。?/td> 0K
描述: IC FLIP FLOP OCT D 2ST 20SOP
標(biāo)準(zhǔn)包裝: 38
系列: 74VHCT
功能: 標(biāo)準(zhǔn)
類型: D 型總線
輸出類型: 三態(tài)非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
頻率 - 時(shí)鐘: 130MHz
延遲時(shí)間 - 傳輸: 5.6ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 8mA,8mA
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 管件
tm
74VHCT374A
Octal
D-T
ype
Flip-Flop
with
3-ST
A
TE
Outputs
May 2007
1997 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74VHCT374A Rev. 1.3
74VHCT374A
Octal D-Type Flip-Flop with 3-STATE Outputs
Features
High speed: fMAX = 140MHz (Typ.) at TA = 25°C
High noise immunity: VIH = 2.0V, VIL = 0.8V
Power down protection is provided on all inputs and
outputs
Low power dissipation: ICC = 4A (Max.) @ TA = 25°C
Pin and function compatible with 74HCT374
General Description
The VHCT374A is an advanced high speed CMOS octal
flip-flop with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while main-
taining the CMOS low power dissipation. This 8-bit
D-type flip-flop is controlled by a clock input (CP) and an
output enable input (OE). When the OE input is HIGH,
the eight outputs are in a high impedance state.
Protection circuits ensure that 0V to 7V can be applied to
the input and output(1) pins without regard to the supply
voltage. This device can be used to interface 3V to 5V
systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note:
1. Outputs in OFF-State.
Ordering Information
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Description
Order Number
Package
Number
Package Description
74VHCT374AM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHCT374ASJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT374AMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Pin Names
Description
D0–D7
Data Inputs
CP
Clock Pulse Input 3-STATE
OE
Output Enable Input 3-STATE
O0–O7
Outputs
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