參數(shù)資料
型號: 74VHCT238ATTR
廠商: 意法半導(dǎo)體
英文描述: 3 TO 8 LINE DECODER
中文描述: 3至8線譯碼器
文件頁數(shù): 1/8頁
文件大?。?/td> 63K
代理商: 74VHCT238ATTR
74VHCT238A
3 TO 8 LINE DECODER
March 2000
I
HIGHSPEED:t
PD
=8ns(TYP.)atV
CC
=5V
I
LOWPOWERDISSIPATION:
I
CC
=4
μ
A(MAX.) at T
A
=25
o
C
I
COMPATIBLEWITH TTL OUTPUTS:
V
IH
=2V (MIN),V
IL
= 0.8V(MAX)
I
POWERDOWN PROTECTIONON INPUTS&
OUTPUTS
I
SYMMETRICALOUTPUTIMPEDANCE:
|I
OH
| = I
OL
= 8 mA(MIN)
I
BALANCEDPROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 4.5Vto 5.5V
I
PINANDFUNCTION COMPATIBLEWITH
74SERIES238
I
IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The 74VHCT238A is an advanced high-speed
CMOS 3 TO 8 LINE DECODER fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
If the device is enabled, 3 binary select inputs (A,
B and C) determine which one of the outputs will
go high. If enable input G1 is held low or either
G2A or G2B is held high, decoding function is
inhibited and all the 8 outputsgo to low.
Three enable inputs are provided to ease
cascade connection and application of this
addressdecodersfor memorysystems.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface5V to 3V.
All
inputs
and
outputs are
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
equipped with
PIN CONNECTION AND IEC LOGIC SYMBOLS
SOP
TSSOP
ORDER CODES
TUBE
74VHCT238AM
PACKAGE
SOP
TSSOP
T & R
74VHCT238AMTR
74VHCT238ATTR
1/8
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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