參數(shù)資料
型號: 74VHC573
廠商: Fairchild Semiconductor Corporation
英文描述: Octal D-Type Latch with 3-STATE Outputs
中文描述: 八路D類鎖存器與三態(tài)輸出
文件頁數(shù): 6/14頁
文件大?。?/td> 289K
代理商: 74VHC573
74VHC573
6/14
Table 9: Dynamic Switching Characteristics
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
Figure 4: Test Circuit
C
L
=15/50pF or equivalent (includes jig and probe capacitance)
R
L
= R1 = 1K
or equivalent
R
T
= Z
OUT
of pulse generator (typically 50
)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
OLP
V
OLV
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input
(note 1, 3)
Dynamic Low
Voltage Input
(note 1, 3)
5.0
C
L
= 50 pF
0.6
0.9
V
-0.9
-0.6
V
IHD
5.0
3.5
V
V
ILD
5.0
1.5
V
TEST
SWITCH
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
, t
PHZ
Open
V
CC
GND
相關(guān)PDF資料
PDF描述
74VHC573M Hex Schmitt-Trigger Inverters 14-SSOP -40 to 85
74VHC573N Hex Schmitt-Trigger Inverters 14-SOIC -40 to 85
74VHC573SJ Hex Schmitt-Trigger Inverters 14-SOIC -40 to 85
74VHC574M Hex Schmitt-Trigger Inverters 14-SOIC -40 to 85
74VHC574T Hex Schmitt-Trigger Inverters 14-SOIC -40 to 85
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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