Note 4: Parameter guaranteed by design. tOS" />
參數(shù)資料
型號(hào): 74VHC541MX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 3/7頁(yè)
文件大?。?/td> 0K
描述: IC BUFF/DVR TRI-ST 8BIT 20SOIC
標(biāo)準(zhǔn)包裝: 1
系列: 74VHC
邏輯類(lèi)型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 8mA,8mA
電源電壓: 2 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC
包裝: 標(biāo)準(zhǔn)包裝
其它名稱(chēng): 74VHC541MXDKR
3
www.fairchildsemi.com
7
4
VH
C54
1
AC Electrical Characteristics
Note 4: Parameter guaranteed by design. tOSLH |tPLHmax tPLHmin|; tOSHL |tPHLmax tPHLmin|.
Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (OPR.) CPD * VCC * fIN ICC/8 (per bit).
Symbol
Parameter
VCC
(V)
TA 25qCTA 40qC to 85qC
Units
Conditions
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
3.3
r 0.3
5.0
7.0
1.0
8.5
ns
CL 15 pF
tPHL
Time
7.5
10.5
1.0
12.0
CL 50 pF
5.0
r 0.5
3.5
5.0
1.0
6.0
ns
CL 15 pF
5.07.0
1.08.0
CL 50 pF
tPZL
3-STATE Output
3.3
r 0.3
6.8
10.5
1.0
12.5
ns
RL 1 k: CL 15 pF
tPZH
Enable Time
9.3
14.0
1.0
16.0
CL 50 pF
5.0
r 0.5
4.7
7.2
1.0
8.5
ns
CL 15 pF
6.2
9.2
1.0
10.5
CL 50 pF
tPLZ
3-STATE
3.3
r 0.3
11.2
15.4
1.0
17.5
ns
RL 1 k: CL 50 pF
tPHZ
Output
5.0
r 0.5
6.0
8.8
1.0
10.0
CL 50 pF
Disable Time
tOSLH
Output to Output Skew
3.3
r 0.3
1.5
ns
(Note 4)
CL 50 pF
tOSHL
5.0
r 0.5
1.0
CL 50 pF
CIN
Input Capacitance
4
10
pF
VCC Open
COUT
Output Capacitance
6
pF
VCC 5.0V
CPD
Power Dissipation Capacitance
18
pF
(Note 5)
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