參數(shù)資料
型號: 74VHC244
廠商: 意法半導(dǎo)體
英文描述: Octal Bus Buffer with 3 State Outputs (Non Inverted)(三態(tài)輸出的八總線緩沖器)
中文描述: 八路總線緩沖器的三態(tài)輸出(非反相)(三態(tài)輸出的八總線緩沖器)
文件頁數(shù): 1/8頁
文件大?。?/td> 72K
代理商: 74VHC244
74VHC244
OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (NON INVERTED)
September 1998
I
HIGH SPEED:t
PD
= 3.9 ns(TYP.) at V
CC
=5V
I
LOWPOWER DISSIPATION:
I
CC
= 4
μ
A (MAX.) at T
A
=25
o
C
I
HIGH NOISEIMMUNITY:
V
NIH
=V
NIL
=28%V
CC
(MIN.)
I
POWERDOWN PROTECTION ON INPUTS
I
SYMMETRICALOUTPUT IMPEDANCE:
|I
OH
| = I
OL
=8 mA (MIN)
I
BALANCED PROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 2Vto5.5V
I
PIN AND FUNCTION COMPATIBLEWITH
74SERIES244
I
IMPROVEDLATCH-UP IMMUNITY
I
LOWNOISEV
OLP
=0.9V(Max.)
DESCRIPTION
The 74VHC244 is an advanced high speed
CMOS
OCTAL
BUS
fabricated with sub-micron silicon gate and
double-layermetal wiring C
2
MOS technology.
It
has
similar
high
speed
equivalent Bipolar Schottky TTL combined with
true CMOSlow powerdissipation.
BUFFER
(3-STATE)
performance
of
G output enablegoverns four BUS BUFFERs.
This device is designed to be used with 3 state
memory address drivers, etc.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
usedto interface 5V to 3V.
All
inputs and
outputs
protectioncircuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
are
equipped with
PINCONNECTION AND IEC LOGICSYMBOLS
ORDER CODES :
74VHC244M
74VHC244T
M
(MicroPackage)
T
(TSSOP Package)
1/8
相關(guān)PDF資料
PDF描述
74VHC245T Quadruple 2-Input Positive-AND Gates 14-SOIC -40 to 85
74VHC245M Quadruple 2-Input Positive-AND Gates 14-SOIC -40 to 85
74VHC245 Octal Bus Transceiver (3-State)(八總線收發(fā)器)
74VHC257 QUAD 2 CHANNEL MULTIPLEXER 3-STATE
74VHC257M Quadruple 2-Input Positive-AND Gates 14-SOIC -40 to 85
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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