參數(shù)資料
型號: 74VHC240T
廠商: 意法半導(dǎo)體
英文描述: OCTAL BUS BUFFER WITH 3 STATE OUTPUTS INVERTED
中文描述: 八路總線緩沖器3態(tài)輸出倒立
文件頁數(shù): 1/8頁
文件大?。?/td> 65K
代理商: 74VHC240T
74VHC240
OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (INVERTED)
June 1999
I
HIGHSPEED:t
PD
=3.6ns(TYP.)atV
CC
= 5V
I
LOWPOWERDISSIPATION:
I
CC
=4
μ
A(MAX.) at T
A
=25
o
C
I
HIGHNOISEIMMUNITY:
V
NIH
= V
NIL
=28%V
CC
(MIN.)
I
POWERDOWN PROTECTIONON INPUTS
I
SYMMETRICALOUTPUTIMPEDANCE:
|I
OH
| = I
OL
= 8 mA(MIN)
I
BALANCEDPROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 2Vto 5.5V
I
PINANDFUNCTION COMPATIBLEWITH
74SERIES240
I
IMPROVEDLATCH-UP IMMUNITY
I
LOWNOISE:V
OLP
= 0.9V(Max.)
DESCRIPTION
The 74VHC240 is an advanced high-speed
CMOS
OCTAL
BUS
fabricated with sub-micron silicon gate
double-layermetal wiring C
2
MOS technology.
G output enable governsfour BUS BUFFERs.
BUFFER
(3-STATE)
and
This device is designed to be used with 3 state
memory addressdrivers, etc.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface5V to 3V.
All
inputs
and
outputs are
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
equipped with
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES :
74VHC240M
74VHC240T
M
(Micro Package)
T
(TSSOPPackage)
1/8
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