參數(shù)資料
型號: 74VHC08
廠商: 意法半導體
英文描述: QUAD 2-INPUT AND GATE
中文描述: 四2輸入與門
文件頁數(shù): 2/8頁
文件大?。?/td> 148K
代理商: 74VHC08
74VHC08
2/8
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
RECOMMENDED OPERATING CONDITIONS
1) V
IN
from 30% to 70% of V
CC
PIN No
SYMBOL
NAME AND FUNCTION
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
1A to 4A
1B to 4B
1Y to 4Y
GND
V
CC
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
A
B
Y
L
L
H
H
L
H
L
H
L
L
L
H
Symbol
Parameter
Value
Unit
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
I
CC
or I
GND
DC V
CC
or Ground Current
T
stg
Storage Temperature
T
L
Lead Temperature (10 sec)
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 20
±
20
±
25
±
50
-65 to +150
300
V
V
V
mA
mA
mA
mA
°C
°C
Symbol
Parameter
Value
Unit
V
CC
V
I
V
O
T
op
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time (note 1) (V
CC
= 3.3
±
0.3V)
(V
CC
= 5.0
±
0.5V)
2 to 5.5
0 to 5.5
0 to V
CC
-55 to 125
V
V
V
°C
dt/dv
0 to 100
0 to 20
ns/V
相關PDF資料
PDF描述
74VHC08M QUAD 2-INPUT AND GATE
74VHC08MTR Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset 14-TSSOP -40 to 85
74VHC08T Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset 14-TSSOP -40 to 85
74VHC08 Quad 2-Input AND Gate
74VHC08M Quad 2-Input AND Gate
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