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參數(shù)資料
| 型號： | 74VCXH16240 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer With 3.6 V-Tolerant Inputs and Outputs (3-State, Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位緩沖器(3態(tài),反相)) |
| 中文描述： | 低電壓1.8/2.5/3.3V 16位緩沖區(qū)3.6 V的電壓容限輸入和輸出（3態(tài)，反相）（低壓1.8/2.5/3.3V，3.6V的容限輸入和輸出，16位緩沖器（三態(tài)，反相）） |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 141K |
| 代理商： | 74VCXH16240 |
Semiconductor Components Industries, LLC, 2000
August, 2000 – Rev. 0
1
Publication Order Number:
74VCXH16240/D
74VCXH16240
Low-Voltage 1.8/2.5/3.3V
16-Bit Buffer
With 3.6 V–Tolerant Inputs and Outputs
(3–State, Inverting)
The 74VCXH16240 is an advanced performance, inverting 16–bit
buffer. It is designed for very high–speed, very low–power operation
in 1.8 V, 2.5 V or 3.3 V systems.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3 V busses. It is guaranteed to be over–voltage tolerant to 3.6 V.
The 74VCXH16240 is nibble controlled with each nibble
functioning identically, but independently. The control pins may be
tied together to obtain full 16–bit operation. The 3–state outputs are
controlled by an Output Enable (OEn) input for each nibble. When
OEn is LOW, the outputs are on. When OEn is HIGH, the outputs are
in the high impedance state. The data inputs include active bushold
circuitry, eliminating the need for external pull–up resistors to hold
unused or floating inputs at a valid logic state.
Designed for Low Voltage Operation: V
CC
= 1.65–3.6 V
3.6 V Tolerant Inputs and Outputs
High Speed Operation:
2.5 ns max for 3.0 to 3.6 V
3.0 ns max for 2.3 to 2.7 V
6.0 ns max for 1.65 to 1.95 V
Static Drive:
±
24 mA Drive at 3.0 V
±
18 mA Drive at 2.3 V
±
6 mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
Includes Active Bushold to Hold Unused or Floating Inputs at a Valid
Logic State
I
OFF
Specification Guarantees High Impedance When V
CC
= 0 V
Near Zero Static Supply Current in All Three Logic States (20
μ
A)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds
±
300mA @ 125
°
C
ESD Performance: Human Body Model >2000 V; Machine Model >200 V
NOTE:
To ensure the outputs activate in the 3–state condition, the output
enable pins should be connected to V
CC
through a pull–up resistor. The
value of the resistor is determined by the current sinking capability of the
output connected to the OE pin.
http://onsemi.com
MARKING DIAGRAM
A
WL = Wafer Lot
YY
= Year
WW = Work Week
= Assembly Location
TSSOP–48
DT SUFFIX
CASE 1201
1
48
74VCXH16240DT
AWLYYWW
1
48
Device
Package
Shipping
ORDERING INFORMATION
74VCXH16240DT
TSSOP
39 / Rail
74VCXH16240DTR
TSSOP
2500 / Reel
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74VCXH16244 | Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位緩沖器(3態(tài),同相)) |
| 74VCXH16245 | Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver |
| 74VCXH16245DT | Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver |
| 74VCXH16245DTR | Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver |
| 74VCXH16245DTRG | Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74VCXH16240 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74VCXH16240/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low-Voltage 1.8/2.5/3.3V 15-Bit Buffer |
| 74VCXH16240DT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74VCXH16240DTR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 4-Bit Buffer/Driver |
| 74VCXH16240MTD | 功能描述:緩沖器和線路驅(qū)動器 16-Bit Buf/Line Drv RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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