參數(shù)資料
型號(hào): 74VCX86MTC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Voltage Quad 2-Input Exclusive-OR Gate with 3.6V Tolerant Inputs and Outputs
中文描述: ALVC/VCX/A SERIES, QUAD 2-INPUT XOR GATE, PDSO14
封裝: 4.40 MM, MO-153AB, TSSOP-14
文件頁(yè)數(shù): 1/10頁(yè)
文件大?。?/td> 530K
代理商: 74VCX86MTC
2005 Fairchild Semiconductor Corporation
DS500163
www.fairchildsemi.com
July 1999
Revised February 2005
7
74VCX86
Low Voltage Quad 2-Input Exclusive-OR Gate with
3.6V Tolerant Inputs and Outputs
General Description
The VCX86 contains four 2-input exclusive OR gates. This
product is designed for low voltage (1.2V to 3.6V) V
CC
applications with I/O compatibility up to 3.6V
The 74VCX86 is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
Features
I
1.2V to 3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
t
PD
3.0 ns max for 3.0V to 3.6V V
CC
I
Power-off high impedance inputs and outputs
I
Static Drive (I
OH
/I
OL
)
r
24 mA @ 3.0V V
CC
I
Uses patented noise/EMI reduction circuitry
I
Latchup performance exceeds JEDEC 78 conditions
I
ESD performance:
Human body model
!
2000V
Machine model
!
250V
I
Leadless Pb-Free DQFN package
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1:
DQFN package available in Tape and Reel only.
Order Number Package Number
74VCX86M
74VCX86BQX
(Note 1)
74VCX86MTC
Package Description
M14A
MLP014A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MTC14
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