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參數(shù)資料
| 型號： | 74VCX16827MTDX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 10-Bit Buffer/Driver |
| 中文描述： | ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 6.10 MM, MO-153, TSSOP-56 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 55K |
| 代理商： | 74VCX16827MTDX |
March 1998
Revised April 1999
7
1999 Fairchild Semiconductor Corporation
DS500131.prf
www.fairchildsemi.com
74VCX16827
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant
Inputs and Outputs
General Description
The VCX16827 contains twenty non-inverting buffers with
3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver carrying parity. The device is byte controlled. Each
byte has NOR output enables for maximum control flexibil-
ity.
The 74VCX16827 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74VCX16827 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
1.65V–3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
t
PD
2.5 ns max for 3.0V to 3.6V V
CC
3.0 ns max for 2.3V to 2.7V V
CC
6.0 ns max for 1.65V to 1.95V V
CC
I
Power-off high impedance inputs and outputs
I
Supports live insertion and withdrawal (Note 1)
I
Static Drive (I
OH
/I
OL
)
±
24 mA @ 3.0V V
CC
±
18 mA @ 2.3V V
CC
±
6 mA @ 1.65V V
CC
I
Uses patented noise/EMI reduction circuitry
I
Latch-up performance exceeds 300 mA
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Devices also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
74VCX16827MTD
Package Number
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OE
n
I
0
–I
19
O
0
–O
19
Output Enable Input (Active LOW)
Inputs
Outputs
相關PDF資料 |
PDF描述 |
|---|---|
| 74VCX16835 | Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs |
| 74VCX16835MTD | Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs |
| 74VCX16838 | Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs |
| 74VCX16838MTD | Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs |
| 74VCX16841 | Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74VCX16827MTX | 制造商:Rochester Electronics LLC 功能描述: 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74VCX16835 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs |
| 74VCX16835_XBA31162 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74VCX16835GX | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs |
| 74VCX16835MTD | 功能描述:總線收發(fā)器 18-Bit Univ Bus Drv RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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