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參數(shù)資料
| 型號： | 74VCX16601MTDX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs |
| 中文描述： | ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 6.10 MM, MO-153, TSSOP-56 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 156K |
| 代理商： | 74VCX16601MTDX |
2004 Fairchild Semiconductor Corporation
DS500126
www.fairchildsemi.com
March 1998
Revised October 2004
7
74VCX16601
Low Voltage 18-Bit Universal Bus Transceivers
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16601 is an 18-bit universal bus transceiver which
combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. The clock can be con-
trolled by the clock-enable (CLKENAB and CLKENBA)
inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is HIGH. When LEAB is
LOW, the A data is latched if CLKAB is held at a HIGH-to-
LOW logic level. If LEAB is LOW, the A bus data is stored
in the latch/flip-flop on the LOW-to-HIGH transition of
CLKAB. When OEAB is LOW, the outputs are active. When
OEAB is HIGH, the outputs are in the high-impedance
state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, CLKBA and CLKENBA.
The VCX16601 is designed for low voltage (1.4V to 3.6V)
V
CC
applications with I/O capability up to 3.6V.
The VCX16601 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
1.4V to 3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
t
PD
(A to B, B to A)
2.9 ns max for 3.0V to 3.6V V
CC
I
Power-down high impedance inputs and outputs
I
Supports live insertion/withdrawal (Note 1)
I
Static Drive (I
OH
/I
OL
)
±
24 mA @ 3.0V V
CC
I
Uses patented noise/EMI reduction circuitry
I
Latchup performance exceeds 300 mA
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
I
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2:
BGA package available in Tape and Reel only.
Note 3:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number
74VCX16601GX
(Note 2)
74VCX16601MTD
(Note 3)
Package Number
BGA54A
(Preliminary)
MTD56
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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| 74VCX16821MTD | Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74VCX16721 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs |
| 74VCX16721_04 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs |
| 74VCX16721_ZAA31162 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74VCX16721MTD | 功能描述:觸發(fā)器 20-Bit D Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74VCX16721MTD_Q | 功能描述:觸發(fā)器 20-Bit D Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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