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參數(shù)資料
| 型號： | 74VCX162601 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26ヘ Series Resistors in the B-Port Outputs |
| 中文描述： | 低電壓18位通用總線收發(fā)器，在3.6V耐壓輸入和輸出和26ヘ系列電阻在B端口輸出 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 62K |
| 代理商： | 74VCX162601 |
April 1998
Revised April 1999
7
S
1999 Fairchild Semiconductor Corporation
DS500150.prf
www.fairchildsemi.com
74VCX162601
Low Voltage 18-Bit Universal Bus Transceivers with 3.6V
Tolerant Inputs and Outputs and 26
Series Resistors in
the B-Port Outputs
General Description
The VCX162601, 18-bit universal bus transceiver, com-
bines D-type latches and D-type flip-flops to allow data flow
in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. The clock can be con-
trolled by the clock-enable (CLKENAB and CLKENBA)
inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is HIGH. When LEAB is
LOW, the A data is latched if CLKAB is held at a HIGH-to-
LOW logic level. If LEAB is LOW, the A bus data is stored
in the latch/flip-flop on the LOW-to-HIGH transition of
CLKAB. Output-enable OEAB is active-LOW. When OEAB
is HIGH, the outputs are in the HIGH-impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, CLKBA and CLKENBA.
The 74VCX162601 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The VCX162601 is also designed with 26
series resistors
in the B-Port outputs. This design reduces line noise in
applications such as memory address drivers, clock driv-
ers, and bus transceivers/transmitters.
Features
I
1.65V–3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
26
series resistors in B-Port outputs
I
t
PD
(A to B)
3.8 ns max for 3.0V to 3.6V V
CC
4.6 ns max for 2.3V to 2.7V V
CC
9.2 ns max for 1.65V to 1.95V V
CC
I
Power-down high impedance inputs and outputs
I
Supports live insertion/withdrawal (Note 1)
I
Static Drive (I
OH
/I
OL
B outputs)
±
12 mA @ 3.0V V
CC
±
8 mA
@ 2.3V V
CC
±
3 mA @ 1.65V V
CC
I
Uses patented noise/EMI reduction circuitry
I
Latchup performance exceeds 300 mA
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pin Descriptions
Order Number
74VCX162601MTD
Package Number
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OEAB, OEBA
Output Enable Inputs (Active LOW)
LEAB, LEBA
Latch Enable Inputs
CLKAB, CLKBA
Clock Inputs
CLKENAB, CLKENBA
Clock Enable Inputs
A
1
–A
18
B
1
–B
18
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74VCX162601MTD | Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26ヘ Series Resistors in the B-Port Outputs |
| 74VCX162601MTDX | 18-Bit Bus Transceiver |
| 74VCX162827 | Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26ヘ Series Resistors in the Outputs |
| 74VCX162827MTDX | Dual 10-Bit Buffer/Driver |
| 74VCX162827MTD | Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26ヘ Series Resistors in the Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74VCX162601_04 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26з Series Resistors in the B-Port Outputs |
| 74VCX162601_ZAA31162 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74VCX162601MTD | 功能描述:總線收發(fā)器 18-Bit Univ Bus Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74VCX162601MTDX | 功能描述:總線收發(fā)器 18-Bit Univ Bus Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74VCX162827 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 20-Bit Buffer Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in the Outputs |
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