參數(shù)資料
型號(hào): 74V2GU04STR
廠商: 意法半導(dǎo)體
英文描述: TRIPLE INVERTER (SINGLE STAGE)
中文描述: 三重逆變器(單級(jí))
文件頁(yè)數(shù): 1/7頁(yè)
文件大?。?/td> 125K
代理商: 74V2GU04STR
1/7
June 2003
I
HIGH SPEED: t
PD
= 3.5ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 1
μ
A(MAX.) at T
A
= 25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 10% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUT
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN) at V
CC
= 4.5V
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
IMPROVED LATCH-UP IMMUNITY
I
I
I
I
I
I
I
DESCRIPTION
The 74V2GU04 is an advanced high-speed
CMOS TRIPLE INVERTER (SINGLE STAGE)
fabricated
with
sub-micron
double-layer metal wiring C
2
MOS technology.
The internal circuit is composed of a single stages
inverter, then an unbuffered output.
silicon
gate
and
It can be used in analog application such a crystal
oscillator.
Power down protection is provided on input and 0
to 7V can be accepted on input with no regard to
the supply voltage. This device can be used to
interface 5V to 3V.
74V2GU04
TRIPLE INVERTER (SINGLE STAGE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
T & R
SOT23-8L
74V2GU04STR
SOT323-8L
SOT23-8L
相關(guān)PDF資料
PDF描述
74V2T02STR DUAL 2-INPUT NOR GATE
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74V2T03STR DUAL 2-INPUT OPEN DRAIN NAND GATE
74V2T04 TRIPLE INVERTER
74V2T04STR TRIPLE INVERTER
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