參數(shù)資料
型號: 74V1T77CTR
廠商: 意法半導(dǎo)體
元件分類: 通用總線功能
英文描述: SINGLE D-TYPE LATCH
中文描述: 單一的D型鎖存
文件頁數(shù): 3/10頁
文件大?。?/td> 208K
代理商: 74V1T77CTR
74V1T77
3/10
DC SPECIFICATIONS
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3ns)
(*) Voltage range is 5.0V
±
0.5V
CAPACITIVE CHARACTERISTICS
1) C
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
4.5 to
5.5
4.5 to
5.5
4.5
4.5
4.5
4.5
0 to
5.5
2
2
2
V
V
IL
0.8
0.8
0.8
V
V
OH
I
O
=-50
μ
A
I
O
=-8 mA
I
O
=50
μ
A
I
O
=8 mA
4.4
3.94
4.5
4.4
3.8
4.4
3.7
V
V
OL
Low Level Output
Voltage
0.0
0.1
0.36
±
0.1
0.1
0.44
±
1.0
0.1
0.55
±
1.0
V
I
I
Input Leakage
Current
Quiescent Supply
Current
Additional Worst
Case Supply
Current
V
I
= 5.5V or GND
μ
A
I
CC
5.5
V
I
= V
CC
or GND
1
10
20
μ
A
I
CC
5.5
One Input at 3.4V,
other input at V
CC
or GND
1.35
1.5
1.5
mA
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time LE to Q
5.0 (*)
5.0 (*)
5.0 (*)
5.0 (*)
15
50
15
50
4.4
4.8
4.7
5.3
6.5
7.0
6.5
7.0
1.0
1.0
1.0
1.0
7.5
8.0
7.5
8.0
1.0
1.0
1.0
1.0
8.5
9.0
8.5
9.0
ns
t
PLH
t
PHL
Propagation Delay
Time D to Q
ns
t
W
LE Pulse Width,
HIGH
Setup Time D to
LE, HIGH or LOW
Hold Time D to LE,
HIGH or LOW
5.0 (*)
3.0
3.0
3.0
ns
t
s
5.0 (*)
2.0
2.0
2.0
ns
t
h
5.0 (*)
1.0
1.0
1.0
ns
Symbol
Parameter
Test Condition
Value
Unit
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(note 1)
4
10
10
10
pF
8
pF
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