參數(shù)資料
型號(hào): 74LVX4245MTCX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 1/8頁(yè)
文件大?。?/td> 0K
描述: TXRX 8-BIT DUAL 3STATE 24TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Translator Solutions
標(biāo)準(zhǔn)包裝: 1
系列: 74LVX
邏輯類型: 收發(fā)器,非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 12mA,12mA; 24mA,24mA
電源電壓: 2.7 V ~ 3.6 V,4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 1212 (CN2011-ZH PDF)
其它名稱: 74LVX4245MTCXDKR
2003 Fairchild Semiconductor Corporation
DS011540
www.fairchildsemi.com
January 1993
Revised September 2003
7
4
L
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45
8-
Bit
Dual
Sup
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ly
T
rans
lat
ing
T
ran
sceive
rwi
th
3-
S
T
A
T
E
Out
puts
74LVX4245
8-Bit Dual Supply Translating Transceiver
with 3-STATE Outputs
General Description
The LVX4245 is a dual-supply, 8-bit translating transceiver
that is designed to interface between a 5V bus and a 3V
bus in a mixed 3V/5V supply environment. The Transmit/
Receive (T/R) input determines the direction of data flow.
Transmit (active-HIGH) enables data from A Ports to B
Ports; Receive (active-LOW) enables data from B Ports to
A Ports. The Output Enable input, when HIGH, disables
both A and B Ports by placing them in a high impedance
condition. The A Port interfaces with the 5V bus; the B Port
interfaces with the 3V bus.
The LVX4245 is suitable for mixed voltage applications
such as laptop computers using 3.3V CPU’s and 5V LCD
displays.
Features
s Bidirectional interface between 5V and 3V buses
s Control inputs compatible with TTL level
s 5V data flow at A Port and 3V data flow at B Port
s Outputs source/sink 24 mA at 5V bus; 12 mA at 3V bus
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Implements patented EMI reduction circuitry
s Functionally compatible with the 74 series 245
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Truth Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
Order Number
Package Number
Package Description
74LVX4245WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVX4245QSC
MQA24
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
74LVX4245MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
Description
OE
Output Enable Input
T/R
Transmit/Receive Input
A0–A7
Side A Inputs or 3-STATE Outputs
B0–B7
Side B Inputs or 3-STATE Outputs
Inputs
Outputs
OE
T/R
L
Bus B Data to Bus A
L
H
Bus A Data to Bus B
H
X
HIGH-Z State
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