參數(shù)資料
型號(hào): 74LVX3245TTR
廠商: 意法半導(dǎo)體
元件分類: 通用總線功能
英文描述: OCTAL DUAL SUPPLY BUS TRANSCEIVER
中文描述: 八路雙電源總線收發(fā)器
文件頁數(shù): 1/10頁
文件大小: 185K
代理商: 74LVX3245TTR
1/10
July 2001
I
HIGH SPEED :
t
PD
= 8ns (MAX.) at T
A
=25°C
V
CCA
= 3.3V V
CCB
= 5.0V
LOW POWER DISSIPATION:
I
CCA
= I
CCB
= 5
μ
A(MAX.) at T
A
=25°C
LOW NOISE: V
OLP
=0.3V (TYP.) at V
CC
=3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CCA
(OPR) = 2.7V to 3.6V (1.2V Data Retention)
V
CCB
(OPR) = 4.5V to 5.5V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 3245
IMPROVED LATCH-UP IMMUNITY
I
I
I
I
I
I
DESCRIPTION
The 74LVX3245 is a dual supply low voltage
CMOS OCTAL BUS TRANSCEIVER fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology. Designed for use
as an interface between a 5V bus and a 3.3V bus
in a mixed 5V/3.3V supply systems, it achieves
high speed operation while maintaining the CMOS
low power dissipation.
This IC is intended for two-way asynchronous
communication between data buses and the
direction of data transmission is determined by
DIR input. The enable input G can be used to
disable the device so that the buses are effectively
isolated.
The A-port interfaces with the 3V bus, the B-port
with the 5V bus.
All inputs are equipped with protection circuits
against static discharge, giving them 2KV ESD
immunity and transient excess voltage.
74LVX3245
OCTAL DUAL SUPPLY BUS TRANSCEIVER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
SOP
TSSOP
74LVX3245M
74LVX3245MTR
74LVX3245TTR
TSSOP
SOP
相關(guān)PDF資料
PDF描述
74LVX3245M OCTAL DUAL SUPPLY BUS TRANSCEIVER
74LVX3245 OCTAL DUAL SUPPLY BUS TRANSCEIVER
74LVX3245MTR OCTAL DUAL SUPPLY BUS TRANSCEIVER
74LVX3245TTR 8-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
74LVX3245WM 8-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
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