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參數(shù)資料
| 型號： | 74LVX3245MTC |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANSCVR TRI-ST 8BIT 24TSSOP |
| 標(biāo)準(zhǔn)包裝： | 61 |
| 系列： | 74LVX |
| 邏輯功能： | 變換器，3 態(tài) |
| 位數(shù)： | 8 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 通道數(shù)： | 8 |
| 輸出/通道數(shù)目： | 1 |
| 差分 - 輸入:輸出： | 無/無 |
| 傳輸延遲（最大）： | 5.6ns |
| 電源電壓： | 2.7 V ~ 3.6 V，4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1212 (CN2011-ZH PDF) |
5
www.fairchildsemi.com
Capacitance
Symbol
Parameter
Typ
Units
Conditions
CIN
Input Capacitance
4.5
pF
VCC = Open
CI/O
Input/Output
15
pF
VCCA = 3.3V
Capacitance
VCCB = 5.0V
CPD
Power Dissipation
A
→ B
55
pF
VCCB = 5.0V
Capacitance (Note 9)
B
→ A
40
VCCA = 3.3V
Note 9: CPD is measured at 10 MHz
8-Bit Dual Supply Translating Transceiver
The LVX3245 is a dual supply device capable of bidirec-
tional signal translation. This level shifting ability provides
an efficient interface between low voltage CPU local bus
with memory and a standard bus defined by 5V I/O levels.
The device control inputs can be controlled by either the
low voltage CPU and core logic or a bus arbitrator with 5V
I/O levels.
Manufactured on a sub-micron CMOS process, the
LVX3245 is ideal for mixed voltage applications such as
notebook computers using 3.3V CPU's and 5V peripheral
devices.
Power Up Considerations
To insure that the system does not experience unneces-
sary ICC current draw, bus contention, or oscillations during
power up, the following guidelines should be adhered to
(refer to Table 1):
Power up the control side of the device first. This is the
VCCA.
OE should ramp with or ahead of VCCA. This will help
guard against bus contention.
The Transmit/Receive control pin (T/R) should ramp with
VCCA, this will ensure that the A Port data pins are con-
figured as inputs. With VCCA receiving power first, the A
I/O Port should be configured as inputs to help guard
against bus contention and oscillations.
A side data inputs should be driven to a valid logic level.
This will prevent excessive current draw.
The above steps will ensure that no bus contention or oscil-
lations, and therefore no excessive current draw occurs
during the power up cycling of these devices. These steps
will help prevent possible damage to the translator devices
and potential damage to other system components.
TABLE 1. Low Voltage Translator Power Up Sequencing Table
Device Type
VCCA
VCCB
T/R
OE
A Side I/O
B Side I/O
Floatable Pin
Allowed
74LVX3245
3V
5V
ramp
logic
outputs
No
(power up 1st)
configurable
with VCCA
0V or VCCA
Please reference Application Note AN-5001 for more detailed information on using Fairchild’s LVX Low Voltage Dual
Supply CMOS Translating Transceivers.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LVX3245MTC | 制造商:Fairchild Semiconductor Corporation 功能描述:Translator Logic IC |
| 74LVX3245MTCX | 功能描述:總線收發(fā)器 8-Bit Dl Supp Trans RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVX3245MTR | 功能描述:總線收發(fā)器 Octal Bus Transceivr RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVX3245MTR | 制造商:STMicroelectronics 功能描述:OCTAL DUAL SUPPLY BUS TRANSCEIVER |
| 74LVX3245QSC | 功能描述:總線收發(fā)器 8-Bit Dl Supp Trans RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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