參數(shù)資料
型號: 74LVX245SJ
廠商: Fairchild Semiconductor
文件頁數(shù): 1/6頁
文件大?。?/td> 0K
描述: IC TRANSCEIVER 8BIT LV 20SOP
標準包裝: 38
系列: 74LVX
邏輯類型: 收發(fā)器,非反相
元件數(shù): 1
每個元件的位元數(shù): 8
輸出電流高,低: 4mA,4mA
電源電壓: 2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
供應商設備封裝: 20-SOP
包裝: 管件
2005 Fairchild Semiconductor Corporation
DS011597
www.fairchildsemi.com
April 1993
Revised April 2005
7
4
L
VX24
5
Low
V
o
ltage
Oct
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lBidi
rec
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T
ran
sceive
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74LVX245
Low Voltage Octal Bidirectional Transceiver
General Description
The LVX245 contains eight non-inverting bidirectional buff-
ers and is intended for bus-oriented applications. The
Transmit/Receive (T/R) input determines the direction of
data flow through the bidirectional transceiver. Transmit
(active-HIGH) enables data from A ports to B ports;
Receive (active-LOW) enables data from B ports to A
ports. The Output Enable input, when HIGH, disables both
A and B ports by placing them in a high impedance condi-
tion.
Features
s Ideal for low power/low noise 3.3V applications
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbols
Connection Diagram
Pin Descriptions
Truth Table
H
HIGH Voltage Level
X
Immaterial
L
LOW Voltage Level
Order Number
Package Number
Package Description
74LVX245M
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVX245SJ
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin
Description
Names
OE
Output Enable Input
T/R
Transmit/Receive Input
A0–A7
Side A Inputs or 3-STATE Outputs
B0–B7
Side B Inputs or 3-STATE Outputs
Inputs
Outputs
OE
T/R
L
Bus B Data to Bus A
L
H
Bus A Data to Bus B
HX
HIGH-Z State
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