參數(shù)資料
型號(hào): 74LVX157M
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Voltage Quad 2-Input Multiplexer
中文描述: LV/LV-A/LVX/H SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16
封裝: 0.150 INCH, MS-012, SOIC-16
文件頁(yè)數(shù): 4/9頁(yè)
文件大?。?/td> 197K
代理商: 74LVX157M
74LVX157
4/9
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
±
0.3V
CAPACITIVE CHARACTERISTICS
1) C
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/n (per circuit)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time
(A, B - Y)
2.7
2.7
3.3
(*)
3.3
(*)
2.7
2.7
3.3
(*)
3.3
(*)
2.7
2.7
3.3
(*)
3.3
(*)
2.7
3.3
(*)
15
50
15
6.6
9.1
5.1
12.5
16.0
7.9
1.0
1.0
1.0
15.5
19.0
9.5
1.0
1.0
1.0
16.5
20.0
11.0
ns
50
15
50
15
7.6
8.9
11.4
7.0
11.4
16.9
20.4
11.0
1.0
1.0
1.0
1.0
13.0
20.5
24.0
13.0
1.0
1.0
1.0
1.0
14.0
21.5
26.0
14.0
t
PLH
t
PHL
Propagation Delay
Time
(SELECT - Y)
ns
50
15
50
15
9.5
9.1
11.6
7.2
14.5
17.6
21.1
11.5
1.0
1.0
1.0
1.0
16.5
20.5
20.4
13.5
1.0
1.0
1.0
1.0
17.5
21.5
21.4
14.5
t
PLH
t
PHL
Propagation Delay
Time
(STROBE - Y)
ns
50
50
9.7
0.5
0.5
15.0
1.0
1.0
1.0
17.0
1.5
1.5
1.0
18.0
1.5
1.5
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
ns
50
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(note 1)
3.3
4
10
10
pF
3.3
f
IN
= 10MHz
20
pF
相關(guān)PDF資料
PDF描述
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