參數(shù)資料
型號(hào): 74LVX14SJ
廠商: Fairchild Semiconductor
文件頁數(shù): 1/9頁
文件大小: 0K
描述: IC INVERTER HEX SCHMITT 14SOP
標(biāo)準(zhǔn)包裝: 47
系列: 74LVX
邏輯類型: 逆變器,緩沖器
電路數(shù): 6
輸入數(shù): 1
特點(diǎn): 施密特觸發(fā)器
電源電壓: 2 V ~ 3.6 V
電流 - 靜態(tài)(最大值): 2µA
輸出電流高,低: 4mA,4mA
邏輯電平 - 低: 0.9V
邏輯電平 - 高: 2.2V
額定電壓和最大 CL 時(shí)的最大傳播延遲: 14.1ns @ 3.3V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 14-SOIC
封裝/外殼: 14-SOIC(0.209",5.30mm 寬)
包裝: 管件
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1993 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LVX14 Rev. 1.5.0
February 2008
74LVX14
Low Voltage Hex Inverter with Schmitt Trigger Input
Features
Input voltage level translation from 5V to 3V
Ideal for low power/low noise 3.3V applications
Guaranteed simultaneous switching noise level and
dynamic threshold performance
General Description
The LVX14 contains six inverter gates each with a
Schmitt trigger input. They are capable of transforming
slowly changing input signals into sharply defined, jitter-
free output signals. In addition, they have a greater noise
margin than conventional inverters.
The LVX14 has hysteresis between the positive-going
and negative-going input thresholds (typically 1.0V)
which is determined internally by transistor ratios and is
essentially insensitive to temperature and supply voltage
variations.
The inputs tolerate voltages up to 7V allowing the inter-
face of 5V systems to 3V systems.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order
Number
Package
Number
Package Description
74LVX14M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LVX14SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX14MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
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