參數(shù)資料
型號(hào): 74LVX14MTR
廠商: 意法半導(dǎo)體
英文描述: LOW VOLTAGE CMOS HEX SCHMITT INVERTER WITH 5V TOLERANT INPUTS
中文描述: 低電壓CMOS六角施密特逆變器與5V容限輸入
文件頁(yè)數(shù): 1/8頁(yè)
文件大?。?/td> 68K
代理商: 74LVX14MTR
1/8
July 2001
I
HIGH SPEED :
t
PD
= 6.8ns (TYP.) at V
CC
= 3.3V
5V TOLERANT INPUTS
LOW POWER DISSIPATION:
I
CC
= 2
μ
A (MAX.) at T
A
=25
°
C
TYPICAL HYSTERESIS : 1V at V
CC
= 3.3V
LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
= 3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 14
IMPROVED LATCH-UP IMMUNITY
POWER DOWN PROTECTION ON INPUTS
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DESCRIPTION
The 74LVX14 is a low voltage CMOS HEX
SCHMITT INVERTER fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
Pin configuration and function are the same as
those of the 74LVX00 but the 74LVX14 has
hysteresis between the positive and the negative
input threshold typically of 1V.
This together with its schmitt trigger function
allows it to be used on line receivers with slow
rise/fall input signals.
All
inputs
and
outputs
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
are
equipped
with
74LVX14
LOW VOLTAGE CMOS HEX SCHMITT INVERTER
WITH 5V TOLERANT INPUTS
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
SOP
TSSOP
74LVX14M
74LVX14MTR
74LVX14TTR
TSSOP
SOP
相關(guān)PDF資料
PDF描述
74LVX14TTR LOW VOLTAGE CMOS HEX SCHMITT INVERTER WITH 5V TOLERANT INPUTS
74LVX14 Low Voltage CMOS Hex Schmitt Inverter(低壓六施密特反相器)
74LVX14 HEX SCHMITT INVERTER
74LVX14 LOW-VOLTAGE CMOS
74LVX14 LOW-VOLTAGE CMOS
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