參數(shù)資料
型號: 74LVX08MTR
廠商: 意法半導體
英文描述: LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE WITH 5V TOLERANT INPUTS
中文描述: 低電壓CMOS Quad使用5V容限輸入2輸入與門
文件頁數(shù): 4/8頁
文件大小: 163K
代理商: 74LVX08MTR
74LVX08
4/8
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
±
0.3V
CAPACITIVE CHARACTERISTICS
1) C
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/4 (per gate)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time
2.7
2.7
3.3
(*)
3.3
(*)
2.7
3.3
(*)
15
50
15
6.3
8.8
4.8
11.4
14.9
7.1
1.0
1.0
1.0
12.5
17.0
8.5
1.0
1.0
1.0
13.5
18.0
9.5
ns
50
50
7.3
0.5
0.5
10.6
1.0
1.0
1.0
12.0
1.5
1.5
1.0
13.0
1.5
1.5
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
ns
50
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(note 1)
3.3
4
10
10
10
pF
3.3
18
pF
相關(guān)PDF資料
PDF描述
74LVX08 Low Voltage Quad 2-Input AND Gate
74LVX08M Low Voltage Quad 2-Input AND Gate
74LVX08SJ Low Voltage Quad 2-Input AND Gate
74LVX08MTCX_NL Low Voltage Quad 2-Input AND Gate
74LVX08MTC Low Voltage Quad 2-Input AND Gate
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