參數(shù)資料
型號: 74LVX05TTR
廠商: 意法半導(dǎo)體
英文描述: LOW VOLTAGE CMOS HEX INVERTER (OPEN DRAIN) WITH 5V TOLERANT INPUTS
中文描述: 低電壓CMOS六角逆變器(開漏)與5V容限輸入
文件頁數(shù): 1/11頁
文件大?。?/td> 218K
代理商: 74LVX05TTR
1/11
August 2004
I
HIGH SPEED:
t
PD
= 4.8ns (TYP.) at V
CC
= 3.3V
5V TOLERANT INPUTS
INPUT VOLTAGE LEVEL:
V
IL
=0.8V, V
IH
=2V at V
CC
=3V
LOW POWER DISSIPATION:
I
CC
= 2
μ
A (MAX.) at T
A
=25°C
LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
= 3.3V
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 05
IMPROVED LATCH-UP IMMUNITY
POWER DOWN PROTECTION ON INPUTS
I
I
I
I
I
I
I
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DESCRIPTION
The 74LVX05 is a low voltage CMOS OPEN
DRAIN
HEX
INVERTER
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
fabricated
with
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVX05
LOW VOLTAGE CMOS HEX INVERTER (OPEN DRAIN)
WITH 5V TOLERANT INPUTS
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE
T & R
SOP
TSSOP
74LVX05MTR
74LVX05TTR
TSSOP
SOP
Rev. 5
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