參數(shù)資料
型號(hào): 74LVTN16244BDGG,11
廠商: NXP Semiconductors
文件頁(yè)數(shù): 14/16頁(yè)
文件大?。?/td> 0K
描述: IC BUFFER/DVR 16BIT 3ST 48TSSOP
標(biāo)準(zhǔn)包裝: 1
系列: 74LVTN
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 4
每個(gè)元件的位元數(shù): 4
輸出電流高,低: 32mA,64mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 568-5292-6
74LVTN16244B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 2 April 2012
7 of 16
NXP Semiconductors
74LVTN16244B
3.3 V 16-bit buffer/driver; 3-state
9.
Static characteristics
[1]
Typical values are measured at VCC = 3.3 V and at Tamb = 25 C.
[2]
This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.3 V 0.3 V
a transition time of 100
s is permitted. This parameter is valid for T
amb = 25 C only.
[3]
ICC is measured with outputs pulled to VCC or GND.
[4]
This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 40 C to +85 C[1]
VIK
input clamping voltage
VCC = 2.7 V; IIK = 18 mA
1.2
0.85
-
V
VOH
HIGH-level output voltage IOH = 100 A; VCC = 2.7 V to 3.6 V
VCC 0.2 VCC
-V
IOH = 8mA; VCC = 2.7 V
2.4
2.5
-
V
IOH = 32 mA; VCC = 3.0 V
2.0
2.3
-
V
VOL
LOW-level output voltage VCC = 2.7 V
IOL = 100 A
-
0.07
0.2
V
IOL = 24 mA
-
0.3
0.5
V
VCC = 3.0 V
IOL = 16 mA
-
0.25
0.4
V
IOL = 32 mA
-
0.3
0.5
V
IOL = 64 mA
-
0.4
0.55
V
II
input leakage current
all input pins; VCC = 0 V or 3.6 V; VI =5.5 V
-
0.1
10
A
control pins; VCC = 3.6 V; VI =VCC or GND
-
0.1
1.0
A
data pins; unused pins at VCC or GND
VI =VCC; VCC =3.6 V
-
0.1
1
A
VI =0V; VCC =3.6 V
5
0.1
-
A
IOFF
power-off leakage current VCC = 0 V; VI or VO = 0V to4.5V
-
0.1
100
A
ILO
output leakage current
output in HIGH-state when VO >VCC; VO =
5.5 V; VCC =3.0 V
-
50
125
A
IO(pu/pd)
power-up/power-down
output current
VCC 1.2 V; VO = 0.5 V to VCC; VI = GND or
VCC; nOE = don’t care
100
A
IOZ
OFF-state output current
VCC = 3.6 V; VI = VIH or VIL
output HIGH: VO = 3.0 V
-
0.5
5
A
output LOW: VO = 0.5 V
5+0.5
-
A
ICC
supply current
VCC = 3.6 V; VI = GND or VCC; IO =0A
output HIGH
-
0.07
0.12
mA
output LOW
-
4.0
6.0
mA
outputs disabled
0.07
0.12
mA
I
CC
additional supply current
per input pin; VCC = 3.0 V to 3.6 V; one input
at VCC 0.6 V other inputs at VCC or GND
[4] -0.1
0.2
mA
CI
input capacitance
VI = 0V or 3.0V
-
3
-
pF
CO
output capacitance
outputs disabled; VO = 0 V or 3.0 V
-
9
-
pF
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