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參數(shù)資料
| 型號(hào)： | 74LVTH373 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Low Voltage Octal Transparent Latch with 3-STATE Outputs |
| 中文描述： | 低壓八路透明鎖存器與三態(tài)輸出 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 67K |
| 代理商： | 74LVTH373 |
www.fairchildsemi.com
2
7
Connection Diagram
Pin Descriptions
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Z
=
High Impedance
X
=
Immaterial
O
0
=
Previous O
0
before HIGH-to-LOW transition of Latch Enable
Functional Description
The LVT373 and LVTH373 contain eight D-type latches
with 3-STATE standard outputs. When the Latch Enable
(LE) input is HIGH, data on the D
n
inputs enters the
latches. In this condition the latches are transparent, i.e., a
latch output will change state each time its D input
changes. When LE is LOW, the latches store the informa-
tion that was present on the D inputs a setup time preced-
ing the HIGH-to-LOW transition of LE. The 3-STATE
standard outputs are controlled by the Output Enable (OE)
input. When OE is LOW, the standard outputs are in the 2-
state mode. When OE is HIGH, the standard outputs are in
the high impedance mode but this does not interfere with
entering new data into the latches.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
D
0
–D
7
LE
Data Inputs
Latch Enable Input
OE
Output Enable Input
O
0
–O
7
3-STATE Latch Outputs
Inputs
Outputs
LE
OE
D
n
O
n
X
H
X
Z
H
L
L
L
H
L
H
H
L
L
X
O
0
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| 74LVTH373SJ | Low Voltage Octal Transparent Latch with 3-STATE Outputs |
| 74LVTH373WM | Quadruple Positive-NOR Gates With Schmitt-Trigger Inputs 14-TSSOP -40 to 85 |
| 74LVTH543WM | Low Voltage Octal Registered Transceiver with 3-STATE Outputs |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LVTH373MTC | 功能描述:閉鎖 Octal Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LVTH373MTCX | 功能描述:閉鎖 Octal Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LVTH373MTCX_NL | 功能描述:閉鎖 LV OCTAL TRANSP LATCH BH RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LVTH373SJ | 功能描述:閉鎖 Octal Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LVTH373SJ_Q | 功能描述:閉鎖 Octal Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
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