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參數(shù)資料
| 型號： | 74LVTH16374MTD |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FLIP FLOP 16BIT D 3ST 48TSSOP |
| 標準包裝： | 38 |
| 系列： | 74LVTH |
| 功能： | 標準 |
| 類型： | D 型總線 |
| 輸出類型： | 三態(tài)非反相 |
| 元件數(shù)： | 2 |
| 每個元件的位元數(shù)： | 8 |
| 頻率 - 時鐘： | 160MHz |
| 延遲時間 - 傳輸： | 4.5ns |
| 觸發(fā)器類型： | 正邊沿 |
| 輸出電流高，低： | 32mA，64mA |
| 電源電壓： | 2.7 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TFSOP（0.240"，6.10mm 寬） |
| 包裝： | 管件 |
2005 Fairchild Semiconductor Corporation
DS012022
www.fairchildsemi.com
January 1999
Revised June 2005
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74LVT16374 74LVTH16374
Low Voltage 16-Bit D-Type Flip-Flop
with 3-STATE Outputs
General Description
The LVT16374 and LVTH16374 contain sixteen non-invert-
ing D-type flip-flops with 3-STATE outputs and is intended
for bus oriented applications. The device is byte controlled.
A buffered clock (CP) and Output Enable (OE) are com-
mon to each byte and can be shorted together for full 16-bit
operation.
The LVTH16374 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These flip-flops are designed for low-voltage (3.3V) VCC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVT16374 and LVTH16374
are fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining a low power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH16374),
also available without bushold feature (74LVT16374)
s Live insertion/extraction permitted
s Power Up/Power Down high impedance provides
glitch-free bus loading
s Outputs source/sink
32 mA/64 mA
s Functionally compatible with the 74 series 16374
s Latch-up performance exceeds 500 mA
s ESD performance:
Human-body model
! 2000V
Machine model
! 200V
Charged-device model
! 1000V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Note 1: Ordering code “G” indicates Trays.
Note 2: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Order Number
Package Number
Package Description
74LVT16374G
(Note 1)(Note 2)
BGA54A
(Preliminary)
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVT16374MEA
(Note 2)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVT16374MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH16374G
(Note 1)(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVTH16374MEA
(Note 2)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVTH16374MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74LVTH16374MTD_Q | 功能描述:觸發(fā)器 16-Bit D Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LVTH16374MTDX | 功能描述:觸發(fā)器 16-Bit D Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LVTH16500 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74LVTH16500DGGRE4 | 功能描述:通用總線函數(shù) 3.3V ABT 18-Bit Univ Bus Trncvr W/3St Otp RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVTH16500DGGRG4 | 功能描述:通用總線函數(shù) 3.3-V ABT 18B Univ Bus Xcvr RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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