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參數(shù)資料
| 型號： | 74LVTH16245MTDX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal Bus Transceivers With 3-State Outputs 20-TSSOP -40 to 85 |
| 中文描述： | LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 6.10 MM, MO-153, TSSOP-48 |
| 文件頁數(shù)： | 7/18頁 |
| 文件大?。?/td> | 496K |
| 代理商： | 74LVTH16245MTDX |
www.ti.com
PARAMETER MEASUREMENT INFORMATION
t
h
t
su
From Output
Under Test
C
L
= 50 pF
(see Note A)
LOAD CIRCUIT
S1
Open
GND
500
500
Data Input
Timing Input
2.7 V
0 V
2.7 V
0 V
2.7 V
0 V
1.5 V
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
2.7 V
0 V
Input
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
3 V
0 V
V
OL
+ 0.3 V
V
OH
0.3 V
≈
0 V
2.7 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
6 V
GND
TEST
S1
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, Z
O
= 50
, t
r
≤
2.5 ns, t
f
≤
2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
6 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
SN54LVTH16245A, SN74LVTH16245A
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS143Q–MAY 1992–REVISED OCTOBER 2005
Figure 1. Load Circuit and Voltage Waveforms
7
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