參數(shù)資料
型號： 74LVTH16244TTR
廠商： 意法半導(dǎo)體
英文描述： LOW VOLTAGE BICMOS 16 BIT BUS BUFFER WITH BUS HOLD AND POWER UP 3-STATE
中文描述： 低電壓BICMOS工藝的16位總線緩沖器與巴士持有和功率增加了3態(tài)
文件頁數(shù)： 1/13頁
文件大?。?/td> 199K
代理商： 74LVTH16244TTR
1/13
February 2004
I
HIGH SPEED:
t
PD
= 3.2ns (MAX.) at T
A
= 85°C V
CC
= 3.0V
LOW POWER DISSIPATION HIGH LEVEL
OUTPUT: I
CC
= 190
μ
A (MAX.) at T
A
= 85°C
OUTPUT IMPEDANCE:
|I
OH
| = 32mA, I
OL
= 64mA (MIN at V
CC
= 3.0V)
|I
OH
| = 8mA, I
OL
= 24mA (MIN at V
CC
= 2.7V)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN),V
IL
= 0.8V(MAX) at
V
CC
= 2.7 to 3.6V
POWER-UP/DOWN 3-STATE: I
OZPU
= 100
μ
A
MAX at V
CC
= 0V to 1.5V, V
CC
= 1.5V to 0V, T
A
= 85°C
BUS HOLD PROVIDED ON DATA INPUTS
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.7V to 3.6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES H16244
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
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DESCRIPTION
The 74LVTH16244 is a low voltage BiCMOS 16
BIT BUS BUFFER (NON-INVERTED) fabricated
with sub-micron silicon gate and five-layer metal
wiring BiCMOS technology. It is ideal and full
specified for hot-insertion and high speed 3.3V ap-
plications; the power-up/down 3-state circuitry
places the outputs in the high impedance state
during power-up/down, which prevents driver con-
flict. This function is guaranteed when V
CC
is be-
tween 0 and 1.5V. It can be interfaced to 3.3V sig-
nal environment for both inputs and outputs. Any
nG output control governs four BUS BUFFERS.
Output Enable input (nG) tied together gives full
16-bit operation. When nG is LOW, the outputs
are on. When nG is HIGH, the output are in high
impedance state effectively isolated. Bus hold on
data inputs is provided in order to eliminate the
need for external pull-up or pull-down resistors.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
ESD immunity and transient excess voltage.
74LVTH16244
LOW VOLTAGE BICMOS 16 BIT BUS BUFFER
WITH BUS HOLD AND POWER UP 3-STATE
ORDER CODES
PACKAGE
T & R
TSSOP48
TFBGA54
74LVTH16244TTR
74LVTH16244LBR
TSSOP
TFBGA
LOGIC DIAGRAM
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參數(shù)描述
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74LVTH16245ADGGRG4 功能描述:總線收發(fā)器 10-Bit 2.5-V/3.3-V Lo-V FET Bus Switch RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74LVTH16245ADGVRE4 功能描述:總線收發(fā)器 20-Bit FET Bus Switch RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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74LVTH16245ADL 制造商:Texas Instruments 功能描述: 制造商: 功能描述: 制造商:TEXAS INSTRUMENTS INC 功能描述: 制造商:undefined 功能描述:
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